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參數(shù)資料
| 型號(hào)： | MC68HC05PD6 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, TQFP-80 |
| 文件頁(yè)數(shù)： | 154/165頁(yè) |
| 文件大?。?/td> | 841K |
| 代理商： | MC68HC05PD6 |
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July 7, 1997
GENERAL RELEASE SPECIFICATION
MC68HC05PD6
TIMER SYSTEM
MOTOROLA
REV 1.1
9-17
OE2 – Timer Output 2 (EVO) Output Enable
The OE2 bit enables EVO output on PC5 pin. When this bit is changed, control
of the pin is delayed (synchronized) until the next active edge of EVO that is
selected by OL2 bit occurs. This bit is cleared on reset.
0 =
EVO output is disabled
1 =
EVO output is enabled
OL2 – Timer Output 2 Edge select for synchronization
The OL2 bit selects which edge of EVO clock should be synchronized by the
OE2 bit control. The OL2 bit also decides the initial value of the CMP2 divider,
when counter 2 is written to by the CPU. This bit is cleared on reset.
0 =
The falling edge of EVO switches EVO output and PC5 if OE2 bit
has been changed
1 =
The rising edge of EVO switches EVO output and PC5 if OE2 bit has
been changed
9.2.2 Timer Status Register 2 (TSR2)
TI2F – Timer Input 2 (EVI) Interrupt Flag
In Event mode the event edge sets TI2F and in gated time accumulation mode
the trailing edge of the gate signal at the EVI input pin sets TI2F. When TI2IE bit
and this bit are set, an interrupt is generated. This bit is a read only bit and
writes have no effect. The TI2F is cleared by writing a 1 to the RTI2F bit and on
reset.
OC2F – Compare 2 Interrupt Flag
The OC2F bit is set when the compare match is detected between counter 2
and OC2 register. When OC2IE bit and this bit are set, an interrupt is
generated. This bit is a read only bit and writes have no effect. The OC2F is
cleared by writing a 1 to ROC2F bit and on reset.
RTI2F – Reset Timer Input 2 Flag
The RTI2F bit is a write only bit and always read as 0. Writing 1 to this bit clears
TI2F bit and writing a 0 to this bit has no effect.
ROC2F – Reset Output Compare 2 Flag
The ROC2F bit is a write only bit and always read as 0. Writing 1 to this bit
clears OC2F bit and writing a 0 to this bit has no effect.
W
R
TSR2
$001D
reset
TI2F
0
7
00
54
0
0000
6
3210
OC2F
0
RTI2F
ROC2F
0
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