參數(shù)資料
型號: MC68HC05PD6
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, TQFP-80
文件頁數(shù): 106/165頁
文件大?。?/td> 841K
代理商: MC68HC05PD6
July 7, 1997
GENERAL RELEASE SPECIFICATION
MC68HC05PD6
RESETS
MOTOROLA
REV 1.1
5-1
SECTION 5
RESETS
The MCU can be reset in four ways:
by an active low input to the RESET pin,
by initial power-on reset,
by COP watchdog reset, and
by an illegal address access.
The RESET pin is an I/O pin as shown in Figure 5-1. All the peripheral modules
which drive external pins will be reset by the synchronous reset signal (RST)
coming from a latch, which is synchronized to the internal bus clock and set by
any of the four reset sources.
Figure 5-1. Reset Block Diagram
5.1
EXTERNAL RESET (RESET)
The RESET pin is the only external reset source. This pin is connected to a Schmitt trigger
input gate to provide an upper and lower threshold voltage separated by a minimum
amount of hysteresis. This external reset occurs whenever the RESET pin is pulled below
Illegal address Reset
(ILADR)
CPU
LATCH
COP Watchdog
(COPR)
RST
OSC
Data
Address
PH2
To other
peripherals
Mode
Select
To IRQ
logic
LATCH
Power-On Reset
(POR)
VDD
Address
IRQ1
IRQ2
RESET
Opcode
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