參數資料
型號: MC68HC05PD6
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, TQFP-80
文件頁數: 101/165頁
文件大小: 841K
代理商: MC68HC05PD6
GENERAL RELEASE SPECIFICATION
July 7, 1997
MOTOROLA
INTERRUPTS
MC68HC05PD6
4-6
REV 1.1
4.4.3 Key Wake-up Interrupt (KWI)
The eight Key Wake-up interrupt vectors located at $FFF6 and $FFF7.
These eight Key Wake-up inputs (KWI0-KWI7) share pins with Port B. Provided the I bit
in CCR is cleared, each key wake-up input is enabled by the corresponding bit in the
KWIEN register, and Key Wake-up Interrupt (KWI) is enabled by the KWIE bit in the
INTCR.
When a falling edge is detected at one of the enabled key wake-up inputs, the KWIF bit
in the INTSR is set and KWI is generated if KWIE = 1. Each input has a latch which
responds only to the falling edge at the pin and all input latches are cleared at the same
time by clearing KWIF bit (see Figure 4-3).
Figure 4-3. Key Wake-up Interrupt (KWI)
D
C
Q
H
R
READ KWIF
KWIE0
KWI0
(PB0)
Q
R
S
KWIF
D
C
Q
H
R
KWIE1
KWI1
(PB1)
D
C
Q
H
R
KWIE7
KWI7
(PB7)
RESET/POR
KWI
KWI2 to KWI6
Write 1 to RKWIF
KWIE
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