參數(shù)資料
型號: MC68HC05PD6
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, TQFP-80
文件頁數(shù): 119/165頁
文件大?。?/td> 841K
代理商: MC68HC05PD6
July 7, 1997
GENERAL RELEASE SPECIFICATION
MC68HC05PD6
INPUT/OUTPUT PORTS
MOTOROLA
REV 1.1
7-7
Figure 7-1. Port I/O Circuitry
Table 7-1. I/O Pin Functions
NOTE
A “glitch” can be generated on an I/O pin when changing it from an
input to an output unless the data register is rst pre-conditioned to
the desired state before changing the corresponding DDR bit from a
zero to a one.
7.8
PORT OPTION CONTROL REGISTERS
7.8.1 Resistor Control Register 1 (RCR1)
R/W
DDR
I/O Pin Functions
0
The I/O pin is in input mode. Data is written into the output data latch.
0
1
Data is written into the output data latch and output to the I/O pin.
1
0
The state of the I/O pin is read.
1
The I/O pin is in output mode. The output data latch is read.
I/O
PIN
Read Data
Write Data
Data
Register Bit
Internal HC05
Data Bus
Reset
(RST)
Read/Write DDR
Data Direction
Register Bit
OUTPUT
W
R
RCR1
$0008
reset
0
7
00
54
0
0000
6
3210
0
RBH
RBL
RAH
RAL
00
option
map
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