參數(shù)資料
型號： EC000UM
英文描述： EC000 Core User＇s Manual (SCM68000)
中文描述： EC000核心用戶手冊（SCM68000）
文件頁數(shù)： 79/145頁
文件大?。?/td> 829K
代理商： EC000UM
Signal Description
2-10
EC000 CORE PROCESSOR USER’S MANUAL
MOTOROLA
All pins must be multiplexed according to the requirements in Table 2-8. However, it is nec-
essary that the proper three-state control signal be used to control the three-state drivers as
stated in 2.8 Three-State Control. Table 2-8 shows a list of pins and the priority with which
they need to be multiplexed. The priority column has three possible responses: required,
required if used, not required, and internal. The “required if used” response means that the
pin must be muxed out if the pin is used in the current design. The "internal" response means
that the signal may be used internally and must not be muxed out.
Table 2-8. Pin Multiplexing Priority
Signal Name
Pin Name
Input/Output
Priority
Address Bus
A31–A24
Output
Required If Used
Address Bus
A23–A0
Output
Required
Address Output Enable
AOEB
Output
Internal
Address Strobe
ASB
Output
Required
Bus Error
BERRB
Input
Required
Bus Grant
BGB
Output
Required
Bus Grant Acknowledge
BGACKB
Input
Required
Bus Request
BRB
Input
Required
Clock In
CLKI
Input
Required
Clock Out
CLKO
Output
Required If Used
Control Output Enable
COEB
Output
Internal
Data Bus
D15–D0
Input/Output
Required
Disable Control
DISB
Input
Internal
Data Output Enable
DOEB
Output
Internal
Data Strobe
DSB
Output
Required If Used
Data Transfer Acknowledge
DTACKB
Input
Required
Test Clock
TESTCLK
Output
Not Required
Early Read Write
ERWB
Output
Required If Used
Function Code
FC2–FC0
Output
Required
Halt In*
HALTIB
Input
Required
Halt Out*
HALTOB
Output
Required
Interrupt Pending
IPENDB
Output
Required If Used
Interrupt Control
IPLB2–IPLB0
Input
Required
Lower Data Strobe
LDSB
Output
Required
Mode
MODE
Input
Required
CPU Pipe Refill
REFILLB
Output
Required If Used
Reset In*
RESETIB
Input
Required
Reset Out*
RESETOB
Output
Required
Read-Modify-Write
RMCB
Output
Required If Used
Read/Write
RWB
Output
Required
Data Transfer Size
SIZ1, SIZ0
Output
Required If Used
Microsequencer Status Indication
STATUSB
Output
Required If Used
Stop
STOP
Output
Required If Used
Test
TEST
Input
Required
Address Three-State Control
TSCAE
Output
Required If Used
Upper Data Strobe
UDSB
Output
Required
Autovector
AVECB
Input
Required
* HALTIB and HALTOB may share a single pin, HALTB, that is functionally equivalent to
the circuit in Figure 4-10.
RESETIB and RESETOB may share a single pin, RESETB, that is functionally
equivalent to the circuit in Figure 4-10.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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