參數(shù)資料
型號(hào)： EC000UM
英文描述： EC000 Core User＇s Manual (SCM68000)
中文描述： EC000核心用戶(hù)手冊(cè)（SCM68000）
文件頁(yè)數(shù)： 37/145頁(yè)
文件大?。?/td> 829K
代理商： EC000UM
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Electrical Characteristics
7-2
EC000 CORE PROCESSOR USER’S MANUAL
MOTOROLA
7.5 AC ELECTRICAL SPECIFICATIONS—CLOCK TIMING (see Figure 7-1)
7.6 AC ELECTRICAL SPECIFICATIONS—READ AND WRITE CYCLES
(Frequency = 0 to 20 MHz; GND = 0 V; TA = TL to TH; see Figure 7-2 and Figure 7-3)
Num
Characteristic
3.3 V
5.0 V
Unit
Min
Max
Min
Max
Frequency of Operation
—
20.0
—
20.0
MHz
1
Cycle Time
50
—
50
—
ns
2,3
Clock Pulse Width
25
—
25
—
ns
4,5
Clock Rise and Fall Times
—4—4
ns
Figure 7-1. Clock Input Timing Diagram
Num
Characteristic
3.3 V
5.0 V
Unit
Min
Max
Min
Max
6
Clock High to Address Valid
—
20
—
18
ns
6A
Clock High to FC Valid
0
20
0
18
ns
7
Clock High to Address, Data Bus High Impedance (Maximum)
(Write)
—25—20
ns
8
Clock High to Address, FC Invalid (Minimum)
0—0—
ns
9
Clock High to ASB, DSB Asserted
1
20
1
18
ns
111
Address Valid to ASB, DSB Asserted (Read)/ASB Asserted
(Write)
40—40—
ns
11A1
FC Valid to ASB, DSB Asserted (Read)/ASB Asserted (Write)
40
—
40
—
ns
12
Clock Low to ASB, DSB Negated
1
20
1
18
ns
131
ASB, DSB Negated to Address, FC Invalid
10
—
10
—
ns
141,5
ASB and DSB Width Asserted (Read)/ASB Width Asserted
(Write)
100
—
100
—
ns
14A6
DSB Width Asserted (Write)
50
—
50
—
ns
151
ASB, DSB Width Negated (Read)/ASB Width Negated (Write)
50
—
50
—
ns
171,7
ASB, DSB Negated to RWB Invalid
5—5—
ns
18
Clock High to RWB High (Read)
0
20
0
18
ns
20
Clock High to RWB Low (Write)
0
20
0
18
ns
20A
ASB Asserted to RWB Low (Write)
—
10
—
10
ns
211
Address Valid to RWB Low (Write)
0—0—
ns
21A1
FC Valid to RWB Low (Write)
25
—
25
—
ns
221
RWB Low to DSB Asserted (Write)
10
—
10
—
ns
23
Clock Low to Data-Out Valid (Write)
—
20
—
18
ns
0.2 VDD
0.8 VDD
Timing measurements are referenced to and from a low voltage of 0.2 VDD and a high
voltage of 0.8 VDD, unless otherwise noted. The voltage swing through this range
should start outside and pass through the range such that the rise or fall will be linear
between 0.2 VDD and 0.8 VDD.
4
5
2
1
3
NOTE:
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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