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參數資料
| 型號： | EC000UM |
| 英文描述： | EC000 Core User＇s Manual (SCM68000) |
| 中文描述： | EC000核心用戶手冊（SCM68000） |
| 文件頁數： | 133/145頁 |
| 文件大?。?/td> | 829K |
| 代理商： | EC000UM |
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Exception Processing
MOTOROLA
EC000 CORE PROCESSOR USER’S MANUAL
4-3
bit was not modified). External memory management hardware should not treat the access
in the old FC space as an error.
4.1.4 Reference Classification
When the SCM68000 makes a reference, it classifies the reference according to the encod-
ing of the three function code output lines. This classification allows external translation of
addresses, control of access, and differentiation of special SCM68000 states, such as CPU
space (used by interrupt acknowledge cycles). Table 4-1 lists the classification of refer-
ences.
4.1.5 CPU Space Cycle
A CPU space cycle, indicated when the function codes are all high, is a special cycle. Bits
A19–A16 of the address bus identify sixteen types of CPU space cycles. The interrupt
acknowledge cycle, in which A19–A16 are high, is currently the only defined CPU space
cycle for the SCM68000. Other configurations of A19–A16 are reserved by Motorola to
define other types of CPU cycles used in other M68000 Family microprocessors. Figure 4-
1 shows the encoding of CPU space addresses.
4.1.5.1 INTERRUPT ACKNOWLEDGE CYCLE. The interrupt acknowledge cycle places
the level of the interrupt being acknowledged on address bits A3–A1 and drives all other ad-
dress lines high. For a vectored interrupt, the interrupt acknowledge cycle reads a vector
number when the interrupting device places a vector number on the data bus and asserts
DTACKB to acknowledge the cycle. The timing diagram for a vectored interrupt is shown in
Table 4-1. Reference Classification
Function Code Output
Address Space
FC2
FC1
FC0
0
(Reserved)
*
0
1
User Data
0
1
0
User Program
0
1
(Undefined)
*
1
0
(Reserved)
*
1
0
1
Supervisor Data
1
0
Supervisor Program
1
CPU Space
* Address space 3 is reserved for user denition, while 0 and
4 are reserved for future use by Motorola.
Figure 4-1. CPU Space Address Encoding
1 1 1 111 111 11 111 111 1 1 111 111 111
11
1
INTERRUPT
ACKNOWLEDGE
FUNCTION
CODE
2
0
31
19
16
0
CPU SPACE
TYPE FIELD
LEVEL
1
31
ADDRESS BUS
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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