參數(shù)資料
型號： EC000UM
英文描述： EC000 Core User＇s Manual (SCM68000)
中文描述： EC000核心用戶手冊（SCM68000）
文件頁數(shù)： 72/145頁
文件大?。?/td> 829K
代理商： EC000UM
Signal Description
MOTOROLA
EC000 CORE PROCESSOR USER’S MANUAL
2-3
listed in the Section 7 Electrical Characteristics. The CLKO output follows CLKI to provide
a reference for testing.
2.4 ASYNCHRONOUS BUS CONTROL
The following signals control asynchronous data transfers: address strobe, read/write, early
read/write, data strobe, upper data strobe, lower data strobe, read-modify-write, data trans-
fer size, and data transfer acknowledge. These signals are described in the following para-
graphs.
2.4.1 Address Strobe (ASB)
This active low, three-state signal indicates that the information on the address bus is a valid
address.
2.4.2 Read/Write (RWB) and Early Read/Write (ERWB)
The active-low, three-state RWB output signal defines the data bus transfer as a read or
write cycle. The active-low, three-state ERWB output signal indicates a write cycle one-half
clock cycle earlier than the read/write signal. Negation times are the same for both signals.
These signals relate to the data strobe signals described in the following paragraphs.
Data Strobe
DSB
Output
Low
TS
No
Yes
Data Transfer Acknowledge
DTACKB
Input
Low
STD
N/A
Early Read Write
ERWB
Output
Low
TS
No
Yes
Function Code
FC2–FC0
Output
High
TS
No
Yes
Halt In
HALTIB
Input
Low
STD
N/A
Halt Out
HALTOB
Output
Low
STD
No
Interrupt Pending
IPENDB
Output
Low
STD
No
Interrupt Control
IPLB2–IPLB0
Input
Low
STD
N/A
Lower Data Strobe
LDSB
Output
Low
TS
No
Yes
Mode
MODE
Input
High
STD
N/A
CPU Pipe Refill
REFILLB
Output
Low
STD
No
Reset In
RESETIB
Input
Low
STD
N/A
Reset Out
RESETOB
Output
Low
STD
No
Read-Modify-Write
RMCB
Output
Low
TS
No
Yes
Read/Write
RWB
Output
Low
TS
No
Yes
Data Transfer Size
SIZ1, SIZ0
Output
High
TS
No
Yes
Microsequencer Status Indication
STATUSB
Output
Low
STD
No
Stop
STOP
Output
High
STD
No
Test
TEST
Input
High
STD
N/A
Test Clock
TESTCLK
Output
High
STD
No
Address Three-State Control
TSCAE
Output
High
STD
No
Upper Data Strobe
UDSB
Output
Low
TS
No
Yes
NOTE:
TS = Three-State Output
STD = Standard CMOS Output
Table 2-1. Signal Summary
Signal Name
Mnemonic
Input/ Output
Active
State
Output
Circuit
Hi-Z on
HALTIB or
STOP
Instruction
Hi-Z on Bus
Relinquish
or RESETIB
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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