2004 Mar 16
75
Philips Semiconductors
Product specification
PC-CODEC
SAA7108E; SAA7109E
Remark
: Due to bandwidth considerations XPSC[5:0] and
XACL[5:0] can be chosen differently to the previously
mentioned equations or Table 41, as the horizontal phase
scaling is able to scale in the range from zooming up by
factor 3 to downscaling by a factor of
1024
8191
.
Figs 34 and 35 show some frequency characteristics of
the prescaler.
Table 41 shows the recommended prescaler
programming.Otherprogramming,thangiveninTable 41,
may result in better alias suppression, but the resulting
DC gain amplification needs to be compensated by the
BCS control, according to the equation:
Where:
2
XDCG[2:0]
≥
DC gain
DC gain = (XC2_1 + 1)
×
XACL[5:0] + (1
XC2_1).
For example, if XACL[5:0] = 5, XC2_1 = 1, then
DC gain = 10 and the required XDCG[2:0] = 4.
The horizontal source acquisition timing and the
prescaling ratio is identical for both the luminance and
chrominance path, but the FIR filter settings can be
defined differently in the two channels.
Fade-in and fade-out of the filters is achieved by copying
an original source sample each as first and last pixel after
prescaling.
Figs 32 and 33 show the frequency characteristics of the
selectable FIR filters.
CONT[7:0]
SATN[7:0]
lower integer of
XDCG[2:0]
64
×
DC gain
=
=
Table 40
FIR prefilter functions
PFUV[1:0] A2H[7:6]
PFY[1:0] A2H[5:4]
LUMINANCE FILTER
COEFFICIENTS
CHROMINANCE COEFFICIENTS
00
01
10
11
bypassed
1 2 1
bypassed
1 2 1
3 8 10 8 3
1 2 2 2 1
1 1 1.75 4.5 1.75 1
1
1 2 2 2 1