2004 Mar 16
127
Philips Semiconductors
Product specification
PC-CODEC
SAA7108E; SAA7109E
Table 81
Subaddresses 2AH to 2CH
Table 82
Subaddress 2DH
Table 83
Subaddresses 38H and 39H
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
CG
LSB of the respective bytes are encoded immediately after run-in, the MSBs of the
respective bytes have to carry the CRCC bits, in accordance with the definition of copy
generation management system encoding format.
copy generation data output is disabled; default after reset
copy generation data output is enabled
CGEN
0
1
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
VBSEN
0
pin C7 provides a component GREEN signal (CVBSEN1 = 0) or CVBS signal
(CVBSEN1 = 1)
pin C7 provides a luminance (VBS) signal; default after reset
pin C7 provides a component GREEN (G) or luminance (VBS) signal; default after reset
pin C7 provides a CVBS signal
pin C6 provides a component BLUE (B) or colour difference BLUE (C
B
) signal
pin C6 provides a CVBS signal; default after reset
pin C8 provides a component RED (R) or colour difference RED (C
R
) signal
pin C8 provides a chrominance signal (C) as modulated subcarrier for S-video; default after
reset
encoder is active; default after reset
encoder bypass, DACs are provided with RGB signal after cursor insertion block
pin C4 provides a teletext request signal (TTXRQ)
pin C4 provides the buffered crystal clock divided by two (13.5 MHz); default after reset
1
0
1
0
1
0
1
CVBSEN1
CVBSEN0
CEN
ENCOFF
0
1
0
1
CLK2EN
DATA BYTE
DESCRIPTION
GY4 to GY0
Gain luminance of RGB (C
R
, Yand C
B
) output, ranging from (1
16
32
) to (1 +
15
32
).
Suggested nominal value = 0, depending on external application.
Gain colour difference of RGB (C
R
, Yand C
B
) output, ranging from (1
16
32
) to (1 +
15
32
).
Suggested nominal value = 0, depending on external application.
GCD4 to GCD0