2004 Mar 16
13
Philips Semiconductors
Product specification
PC-CODEC
SAA7108E; SAA7109E
Notes
1.
2.
3.
Pin type: I = input, O = output, S = supply, pu = pull-up.
For board design without boundary scan implementation connect TRSTe and TRSTd to ground.
This pin provides easy initialization of the Boundary Scan Test (BST) circuit. TRSTe and TRSTd can be used to force
the Test Access Port (TAP) controller to the TEST_LOGIC_RESET state (normal operation) at once.
In accordance with the “IEEE1149.1”standard the pads TDIe (TDId), TMSe (TMSd), TCKe (TCKd) and TRSTe
(TRSTd) are input pads with an internal pull-up resistor and TDOe (TDOd) is a 3-state output pad.
Pin strapping is done by connecting the pin to supply via a 3.3 k
resistor. During the power-up reset sequence the
corresponding pins are switched to input mode to read the strapping level. For the default setting no strapping
resistor is necessary (internal pull-down).
Pin ALRCLK: 0 = 24.576 MHz crystal (default); 1 = 32.110 MHz crystal.
Pin RTCO: operates as I
2
C-bus slave address pin; RTCO = 0 slave address 42H/43H (default); RTCO = 1 slave
address 40H/41H.
4.
5.
6.
7.
XTALId
XTALOd
XTOUTd
V
SSXd
AI24
AI23
AI2D
AI22
AI21
AI12
AI1D
AI11
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
I
27 MHz crystal input (decoder)
27 MHz crystal output (decoder)
crystal oscillator output signal (decoder); auxiliary signal
ground for crystal oscillator (decoder)
analog input 24
analog input 23
differential analog input for channel 2; connect to ground via a capacitor
analog input 22
analog input 21
analog input 12
differential analog input for channel 1; connect to ground via a capacitor
analog input 11
O
O
S
I
I
I
I
I
I
I
I
SYMBOL
PIN
TYPE
(1)
DESCRIPTION
handbook, halfpage
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
2 3 4 5 6 7 8 9 10 11 12 13 14
MHB888
SAA7108E
SAA7109E
Fig.4 Pin configuration.