2
1
P
P
P
S
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Miscellaneous,
VGATE configuration and MSBs
Raw data gain control
Raw data offset control
Reserved
Status byte video decoder
(read only, OLDSB = 0)
Status byte video decoder
(read only, OLDSB = 1)
Reserved
17
LLCE
LLC2E
(1)
(1)
(1)
VGPS
VSTO8
VSTA8
18
19
RAWG7
RAWO7
(1)
RAWG6
RAWO6
(1)
RAWG5
RAWO5
(1)
RAWG4
RAWO4
(1)
RAWG3
RAWO3
(1)
RAWG2
RAWO2
(1)
RAWG1
RAWO1
(1)
RAWG0
RAWO0
(1)
1A to 1E
1F
INTL
HLVLN
FIDT
GLIMT
GLIMB
WIPA
COPRO
RDCAP
1F
INTL
HLCK
FIDT
GLIMT
GLIMB
WIPA
SLTCA
CODE
20 to 2F
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Audio clock generator part: registers 30H to 3FH
Audio master clock cycles per
field
30
31
32
33
34
35
36
37
38
39
3A
ACPF7
ACPF15
(1)
ACPF6
ACPF14
(1)
ACPF5
ACPF13
(1)
ACPF4
ACPF12
(1)
ACPF3
ACPF11
(1)
ACPF2
ACPF10
(1)
ACPF1
ACPF9
ACPF17
(1)
ACPF0
ACPF8
ACPF16
(1)
Reserved
Audio master clock nominal
increment
(1)
(1)
(1)
(1)
(1)
(1)
ACNI7
ACNI15
(1)
ACNI6
ACNI14
(1)
ACNI5
ACNI13
ACNI21
(1)
ACNI4
ACNI12
ACNI20
(1)
ACNI3
ACNI11
ACNI19
(1)
ACNI2
ACNI10
ACNI18
(1)
ACNI1
ACNI9
ACNI17
(1)
ACNI0
ACNI8
ACNI16
(1)
Reserved
Clock ratio AMXCLK to ASCLK
Clock ratio ASCLK to ALRCLK
Audio clock generator basic
set-up
Reserved
(1)
(1)
(1)
(1)
SDIV5
LRDIV5
(1)
SDIV4
LRDIV4
(1)
SDIV3
LRDIV3
APLL
SDIV2
LRDIV2
AMVR
SDIV1
LRDIV1
LRPH
SDIV0
LRDIV0
SCPH
(1)
(1)
(1)
(1)
3B to 3F
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
General purpose VBI data slicer part: registers 40H to 7FH
Slicer control 1
LCR2 to LCR24 (n = 2 to 24)
Programmable framing code
40
(1)
HAM_N
LCRn_6
FC6
FCE
LCRn_5
FC5
HUNT_N
LCRn_4
FC4
(1)
(1)
(1)
(1)
41 to 57
58
LCRn_7
FC7
LCRn_3
FC3
LCRn_2
FC2
LCRn_1
FC1
LCRn_0
FC0
REGISTER FUNCTION
SUB
ADDR.
(HEX)
D7
D6
D5
D4
D3
D2
D1
D0