2004 Mar 16
159
Philips Semiconductors
Product specification
PC-CODEC
SAA7108E; SAA7109E
18.2.2.15 Subaddress 0EH
Table 163
Chrominance control 1; 0EH[7:0]
18.2.2.16 Subaddress 0FH
Table 164
Chrominance gain control; 0FH[7:0]
BIT
DESCRIPTION
SYMBOL
VALUE
FUNCTION
50 Hz/625 LINES
60 Hz/525 LINES
7
clear DTO
CDTO
0
1
disabled
Every time CDTO is set, the internal subcarrier DTO
phase is reset to 0
°
and the RTCO output generates a
logic 0 at time slot 68 (see document “RTC Functional
Description” available on request). So an identical
subcarrier phase can be generated by an external device
(e.g. an encoder).
PAL BGDHI (4.43 MHz)
NTSC 4.43 (50 Hz)
Combination-PAL N
(3.58 MHz)
NTSC N (3.58 MHz)
reserved
SECAM
reserved;
do not use
reserved;
do not use
chrominance vertical filter and PAL phase error
correction on (during active video lines)
chrominance vertical filter and PAL phase error
correction permanently off
nominal time constant
fast time constant for special applications
disabled
active
6 to 4 colour standard selection
CSTD[2:0]
000
001
010
NTSC M (3.58 MHz)
PAL 4.43 (60 Hz)
NTSC 4.43 (60 Hz)
011
100
101
110
111
0
PAL M (3.58 MHz)
NTSC-Japan (3.58 MHz)
reserved
3
disable chrominance
vertical filter and PAL
phase error correction
DCVF
1
2
fast colour time constant
FCTC
0
1
0
1
0
adaptive chrominance
comb filter
CCOMB
BIT
DESCRIPTION
SYMBOL
VALUE
FUNCTION
7
automatic chrominance
gain control
ACGC
0
1
on
programmable gain via CGAIN6 to CGAIN0; need to be
set for SECAM standard
CGAIN[6:0] 000 0000 minimum gain (0.5)
010 0100 nominal gain (1.125)
111 1111 maximum gain (7.5)
6 to 0 chrominance gain value
(if ACGC is set to logic 1)