2004 Mar 16
172
Philips Semiconductors
Product specification
PC-CODEC
SAA7108E; SAA7109E
18.2.4.9
Subaddress 60H
Table 190
Slicer status byte 0; 60H[6:2]; read only register
18.2.4.10 Subaddresses 61H and 62H
Table 191
Slicer status byte 1; 61H[5:0] and slicer status byte 2; 62H[7:0]; read only registers
18.2.5
P
ROGRAMMING REGISTER INTERFACES AND SCALER PART
18.2.5.1
Subaddress 80H
Table 192
Global control 1; global set 80H[6:4]
SWRST moved to subaddress 88H[5]; note 1.
Note
1.
X = don’t care.
BIT
DESCRIPTION
SYMBOL VALUE
FUNCTION
6
framing code valid
FC8V
0
1
0
1
0
1
0
1
0
1
no framing code (0 error) in the last frame detected
framing code with 0 error detected
no framing code (1 error) in the last frame detected
framing code with 1 error detected
no VPS in the last frame
VPS detected
no PALplus in the last frame
PALplus detected
no Closed Caption in the last frame
Closed Caption detected
5
framing code valid
FC7V
4
VPS valid
VPSV
3
PALplus valid
PPV
2
Closed Caption valid
CCV
SUBADDRESS
BIT
SYMBOL
DESCRIPTION
61H
5
F21_N
LN[8:4]
LN[3:0]
DT[3:0]
field ID as seen by the VBI slicer; for field 1: bit 5 = 0
line number
4 to 0
7 to 4
3 to 0
62H
data type; according to Table 44
TASK ENABLE CONTROL
CONTROL BITS 6 TO 4
SMOD
TEB
TEA
Task of register set A is disabled
Task of register set A is enabled
Task of register set B is disabled
Task of register set B is enabled
The scaler window defines the F and V timing of the scaler output
VBI data slicer defines the F and V timing of the scaler output
X
X
X
X
0
1
X
X
0
1
X
X
0
1
X
X
X
X