2004 Mar 16
43
Philips Semiconductors
Product specification
PC-CODEC
SAA7108E; SAA7109E
Table 24
“ITU-R BT.601”signal component levels
Note
1.
Transformation:
a) R = Y + 1.3707
×
(C
R
128)
b) G = Y
0.3365
×
(C
B
128)
0.6982
×
(C
R
128)
c) B = Y + 1.7324
×
(C
B
128).
Table 25
Pin assignment for input format 0
Table 26
Pin assignment for input format 1
Table 27
Pin assignment for input format 2
Table 28
Pin assignment for input format 3
COLOUR
SIGNALS
(1)
Y
C
B
128
16
166
54
202
90
240
128
C
R
128
146
16
34
222
240
110
128
R
G
B
White
Yellow
Cyan
Green
Magenta
Red
Blue
Black
235
210
170
145
106
81
41
16
235
235
16
16
235
235
16
16
235
235
235
235
16
16
16
16
235
16
235
16
235
16
235
16
8 + 8 + 8-BIT 4 : 4 : 4 NON-INTERLACED
RGB/C
B
-Y-C
R
PIN
FALLING
CLOCK EDGE
RISING
CLOCK EDGE
PD11
PD10
PD9
PD8
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
G3/Y3
G2/Y2
G1/Y1
G0/Y0
B7/C
B
7
B6/C
B
6
B5/C
B
5
B4/C
B
4
B3/C
B
3
B2/C
B
2
B1/C
B
1
B0/C
B
0
R7/C
R
7
R6/C
R
6
R5/C
R
5
R4/C
R
4
R3/C
R
3
R2/C
R
2
R1/C
R
1
R0/C
R
0
G7/Y7
G6/Y6
G5/Y5
G4/Y4
5 + 5 + 5-BIT 4 : 4 : 4 NON-INTERLACED RGB
PIN
FALLING
CLOCK EDGE
RISING
CLOCK EDGE
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
G2
G1
G0
B4
B3
B2
B1
B0
X
R4
R3
R2
R1
R0
G4
G3
5 + 6 + 5-BIT 4 : 4 : 4 NON-INTERLACED RGB
PIN
FALLING
CLOCK EDGE
RISING
CLOCK EDGE
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
G2
G1
G0
B4
B3
B2
B1
B0
R4
R3
R2
R1
R0
G5
G4
G3
8 + 8 + 8-BIT 4 : 2 : 2 NON-INTERLACED C
B
-Y-C
R
PIN
FALLING
CLOCK
EDGE
n
RISING
CLOCK
EDGE
n
FALLING
CLOCK
EDGE
n + 1
RISING
CLOCK
EDGE
n + 1
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
C
B
7(0)
C
B
6(0)
C
B
5(0)
C
B
4(0)
C
B
3(0)
C
B
2(0)
C
B
1(0)
C
B
0(0)
Y7(0)
Y6(0)
Y5(0)
Y4(0)
Y3(0)
Y2(0)
Y1(0)
Y0(0)
C
R
7(0)
C
R
6(0)
C
R
5(0)
C
R
4(0)
C
R
3(0)
C
R
2(0)
C
R
1(0)
C
R
0(0)
Y7(1)
Y6(1)
Y5(1)
Y4(1)
Y3(1)
Y2(1)
Y1(1)
Y0(1)