2004 Mar 16
181
Philips Semiconductors
Product specification
PC-CODEC
SAA7108E; SAA7109E
Table 212
X port formats and configuration; register set A [91H[2:0]] and B [C1H[2:0]]; note 1
Notes
1.
2.
X = don’t care.
FSC2 and FSC1 only to be used, if X port input source don’t provide chroma information for every input line. X port
input stream must contain dummy chroma bytes.
Table 213
X port input reference signal definitions; register set A [92H[7:4]] and B [C2H[7:4]]; note 1
Note
1.
X = don’t care.
SCALER INPUT FORMAT AND CONFIGURATION FORMAT
CONTROL
CONTROL BITS 2 TO 0
FSC2
(2)
FSC1
(2)
FSC0
Input is Y-C
B
-C
R
4 : 2 : 2 like sampling scheme
Input is Y-C
B
-C
R
4 : 1 : 1 like sampling scheme
Chroma is provided every line, default
Chroma is provided every 2nd line
Chroma is provided every 3rd line
Chroma is provided every 4th line
X
X
0
0
1
1
X
X
0
1
0
1
0
1
X
X
X
X
X PORT INPUT REFERENCE SIGNAL DEFINITIONS
CONTROL BITS 7 TO 4
XFDV
XFDH
XDV1
XDV0
Rising edge of XRV input and decoder V123 is vertical reference
Falling edge of XRV input and decoder V123 is vertical reference
XRV is a V-sync or V gate signal
XRV is a frame sync, V pulses are generated internally on both edges of
FS input
X port field ID is state of XRH at reference edge on XRV (defined by
XFDV)
Field ID (decoder and X port field ID) is inverted
Reference edge for field detection is falling edge of XRV
Reference edge for field detection is rising edge of XRV
X
X
X
X
X
X
X
X
X
X
0
1
0
1
X
X
X
0
X
X
X
0
1
1
X
X
X
X
X
X
X
X