2004 Mar 16
188
Philips Semiconductors
Product specification
PC-CODEC
SAA7108E; SAA7109E
Table 231
Horizontal luminance phase offset; register set A [AAH[7:0]] and B [DAH[7:0]]
Table 232
Horizontal chrominance scaling increment; register set A [ACH[7:0]; ADH[7:0]] and B [DCH[7:0]; DDH[7:0]]
Note
1.
Bits XSCC[15:13] are reserved and are set to logic 0.
Table 233
Horizontal chrominance phase offset; register set A [AEH[7:0]] and B [DEH[7:0]]
18.2.5.12 Subaddresses B0H to BFH
Table 234
Vertical luminance scaling increment; register set A [B0H[7:0]; B1H[7:0]] and B [E0H[7:0]; E1H[7:0]]
HORIZONTAL LUMINANCE PHASE
OFFSET
CONTROL BITS 7 TO 0
XPHY7
XPHY6
XPHY5
XPHY4
XPHY3
XPHY2
XPHY1
XPHY0
Offset = 0
Offset =
1
32
pixel
Offset =
32
32
= 1 pixel
Offset =
255
32
pixel
0
0
0
1
0
0
0
1
0
0
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
1
HORIZONTAL CHROMINANCE
SCALING INCREMENT
CONTROL BITS
A [ADH[7:4]]
B [DDH[7:4]]
A [ADH[3:0]]
B [DDH[3:0]]
A [ACH[7:4]]
B [DCH[7:4]]
A [ACH[3:0]]
B [DCH[3:0]]
XSCC[15:12]
(1)
XSCC[11:8]
XSCC[7:4]
XSCC[3:0]
This value must be set to the
luminance value
1
2
XSCY[15:0]
0000
0000
0001
0000
0000
1111
0000
0000
1111
0000
0001
1111
HORIZONTAL CHROMINANCE
PHASE OFFSET
CONTROL BITS 7 TO 0
XPHC7
XPHC6
XPHC5
XPHC4
XPHC3
XPHC2
XPHC1
XPHC0
This value must be set to
1
2
XPHY[7:0]
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
VERTICAL LUMINANCE SCALING
INCREMENT
CONTROL BITS
A [B1H[7:4]]
B [E1H[7:4]]
A [B1H[3:0]]
B [E1H[3:0]]
A [B0H[7:4]]
B [E0H[7:4]]
A [B0H[3:0]]
B [E0H[3:0]]
YSCY[15:12]
YSCY[11:8]
YSCY[7:4]
YSCY[3:0]
Scale =
1024
1
(theoretical) zoom
Scale =
1024
1023
zoom
Scale = 1, equals 1024
Scale =
1024
1025
downscale
Scale =
1
63.999
downscale
0000
0000
0000
0000
1111
0000
0011
0100
0100
1111
0000
1111
0000
0000
1111
0001
1111
0000
0001
1111