參數(shù)資料
型號: LXP710PE
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 73/84頁
文件大?。?/td> 1108K
代理商: LXP710PE
HDSL Framer/Mapper for 1168 kbps Applications
LXP710
Datasheet
73
Figure 12. E1 Interface Output Timing
Table 120. HDSL Interface Input Timing Specifications
(
Figure 13
)
Parameter
Sym
Min
Typ
1
Max
Unit
Test Conditions
Setup time of LP<1:3>DTI,
RFP<1:3>
t
SU
10
ns
Referenced from rising edge of ICLK1.
Hold time of LP<1:3>DTI,
RFP<1:3>
t
HT
10
ns
Referenced from rising edge of ICLK1.
1. Typical values are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
Figure 13. HDSL Interface Input Timing
Table 121. HDSL Interface Output Timing Specifications
(
Figure 14
)
Parameter
Sym
Min
Typ
1
Max
Unit
Test Conditions
Output delay time of
LP<1:3>DTO, TFP<1:3>
t
D
20
ns
Referenced from falling edge of ICLK1.
1. Typical values are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
t
D
t
PWH
E1CLKO
E1DATO,
E1FRMO
t
PWL
t
PW
t
F
t
R
t
SU
t
HT
ICLK1
LP<1:3>DTI,
RFP<1:3>
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