參數(shù)資料
型號: LXP710PE
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 46/84頁
文件大?。?/td> 1108K
代理商: LXP710PE
LXP710
HDSL Framer/Mapper for 1168 kbps Applications
46
Datasheet
Demux Loop 1 FEBE Error Counter
Address: 38
Abbreviation: DXL1FEBEEC
Read
Demux Loop 1 BPV Error Counter
Address: 39
Abbreviation: DXL1BPVEC
Read
Loop 1 QRSS Test Pattern Error Counter (2 bytes)
Address: 3A
Abbreviation: L1PATECH
Read
Table 57. Demux Loop 1 CRC Error Count
Bit
Name
Default
Description
<7:0>
CRC1EC<7:0>
0
Demux Loop 1 CRC Error Counter. This 8-bit counter increments each time
one or more errors are detected on the demux Loop 1 CRC-6 bits. After a
microprocessor read, the counter is cleared. This counter is disabled when
the LOSW1 signal is High, and automatically stops at 0FFh to prevent
overflow.
Table 58. Demux Loop 1 FEBE Error Count
Bit
Name
Default
Description
<7:0>
FEBE1EC<7:0>
0
Demux Loop 1 FEBE Error Counter. This 8-bit counter increments each time
one or more errors are detected on the demux Loop 1 FEBE bits. After a
microprocessor read, the counter is cleared. This counter is disabled when the
LOSW1 signal is High, and automatically stops at 0FFh to prevent overflow.
Table 59. Demux Loop 1 BPV Error Count
Bit
Name
Default
Description
<7:0>
BPV1EC<7:0>
0
Demux Loop 1 BPV Error Counter. This 8-bit counter increments each time
one or more errors are detected on the demux Loop 1 BPV bits. After a
microprocessor read, the counter is cleared. This counter is disabled when
the LOSW1 signal is High, and automatically stops at 0FFh to prevent
overflow.
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