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參數(shù)資料
| 型號(hào)： | LXP730LE |
| 元件分類(lèi)： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁(yè)數(shù)： | 1/70頁(yè) |
| 文件大?。?/td> | 1007K |
| 代理商： | LXP730LE |
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LXP730
Multi-Rate DSL Framer
Datasheet
The LXP730 is a multi-purpose Digital Subscriber Line (DSL) framer which complements the
Level One SK70725/21 Enhanced MDSL Data Pump (EMDP) to provide seamless transport of
data and voice signals over one or more DSL datapaths.
Applications
Product Features
The LXP730 in combination with the EMDP
chipset is optimized for use as a framer or I/O
interface device for the following applications:
I
Digital Pair Gain Systems
I
Ethernet Modems
I
T1/E1 Fractional Transport Systems
I
Videoconferencing Systems
I
Simultaneous Data - Voice Transport
Systems
I
Wireless Base Station Access Systems
The LXP730 provides the basic functions
required of a DSL framer:
I
Synchronization of external data streams to
the DSL line
I
Multiplexing and demultiplexing of
independent data streams for voice and data
I
Loopback of payload data at the DSL
interface
I
Creation, insertion, and recovery of the
MDSL Overhead (MOH) structure,
performance monitoring, and message
transport required in a DSL system with a
capacity of up to 32 kbps
I
Supports two input/output data streams
simultaneously
—Slave mode: external clock determines
the rate at which data will be transferred
to and from the framer
—Master mode: clock derived from
received DSL clock or external
oscillator
I
Single part architecture allows one chip to
be used economically in both central and
remote locations
I
Supports systems with point-to-point
architectures
I
Alternate Hardware Control mode (HWC)
for operation without an external
microprocessor
As of January 15, 2001, this document replaces the Level One document
LXP730 Multi-Rate DSL Framer Datasheet
.
Order Number: 249266-001
January 2001
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