參數(shù)資料
型號(hào): LXP730LE
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 38/70頁
文件大?。?/td> 1007K
代理商: LXP730LE
LXP730
Multi-Rate DSL Framer
38
Datasheet
Figure 15. Asynchronous Port Timing
Table 13. Asynchronous Port Timing Specifications (See Figure 15)
Parameter
Sym
Min
Typ
1
Max
Unit
Time to next adjacent byte
t
BYTE
_
SPACE
-
8 x BIT_CLK
-1
-
seconds
Clock period
t
PER
-
MCLK
-1
x
SAPCLKDIV
-
seconds
Delay to first transmit byte
t
D
1
-
140 x BIT_CLK
-1
-
seconds
Delay to first receive byte
t
D
2
-
11 x BIT_CLK
-1
-
seconds
Set-up time
t
SU
20
-
ns
Hold time
t
HT
10
-
ns
Output delay
t
D
-
-
40
ns
1. Typical figures are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
OSIF
SDICK
t
BYTE_SPACE
t
D1
t
SU
SDICK
SDI
t
HT
t
D
SDOCK
SDO
t
D2
t
BYTE_SPACE
SDOCK
OSOF
t
PER
t
PER
Arrows on clocks indicate
sampling edge
Waveforms assume ADPI
programmed for first two
MDSL channels
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