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參數(shù)資料
| 型號(hào)： | LXP730LE |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 12/70頁 |
| 文件大?。?/td> | 1007K |
| 代理商： | LXP730LE |
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LXP730
—
Multi-Rate DSL Framer
12
Datasheet
42
INT
DO
INT.
Interrupt output. Programmed by setting bits in the INT_EN register.
56
RESET
DI
RESET.
Active low input. All registers revert to their default values.
8
MCLK
DI
MCLK.
Master Clock.
4
CDATI
DI
CDATI.
Codec Data In.
3
CDATO
TO
CDATO.
Codec Data Out, Tri-state.
2
CCLK/TCLKO
TO
CCLK.
Codec Clock, Nominal 2.048 MHz, tri-state. /
TCLKO.
Transport Clock for T1/
E1: 1.544 MHz or 2.048 MHz clock derived from line rate.
5
FRMSYNC1/
FRMOUT
DO
FRMSYNC1.
Frame Sync Pulse, channel 1, output. /FRMOUT. Frame Out, for T1/E1
application, output.
6
FRMSYNC2
DO
FRMSYNC2.
Frame Sync Pulse, channel 2, output.
7
FRMSYNC3
DO
FRMSYNC3.
Frame Sync Pulse, channel 3, output.
62
FRMSYNC4
DO
FRMSYNC4.
Frame Sync Pulse, channel 4, output.
61
FRMSYNC5
DO
FRMSYNC5.
Frame Sync Pulse, channel 5, output.
60
FRMSYNC6
DO
FRMSYNC6.
Frame Sync Pulse, channel 6, output.
59
FRMSYNC7/
SDOCK
DO
FRMSYNC7.
Frame Sync Pulse, channel 7, output.
/SDOCK.
Serial Data Out Clock,
ADPI serial mode, output.
58
FRMSYNC8/ SDO
DO
FRMSYNC8.
Frame Sync Pulse, channel 8, output.
/SDO.
Serial Data Out, ADPI
serial mode, output.
55
FRMSYNC9
SDICK
DO
FRMSYNC9.
Frame Sync Pulse, channel 9, output.
/SDICK.
Serial Data In Clock,
ADPI serial mode, output.
54
FRMSYNC10/ SDI
DO, DI
FRMSYNC10.
Frame Sync Pulse, channel 10, output. /
SDI.
Serial Data In, ADPI
serial mode, input.
53
FRMSYNC11
DO
FRMSYNC11.
Frame Sync Pulse, channel 11, output.
52
FRMSYNC12/
PDOE
DO
FRMSYNC12.
Frame Sync Pulse, channel 12, output. /
PDOE.
PCM Data Output
Enable, control for external PCM interface buffer, output. Enabled by bit-3 of Register
23h.
51
GAP_CLK
DO
GAP_CLK.
Gapped Clock, N x 64 kHz recovered from DSL for optional external
ADPLL, output. Output is high when option not selected.
63
TEST1
DI
TEST1.
Factory Test Pin 1, input; should be tied to GND.
11
TEST2
DI
TEST2.
Factory Test Pin 2, input; should be tied to VCC.
21
OSDICK
DO
OSDCKI.
Overhead Serial Data In Clock, output.
20
OSDI
PU
OSDI.
Overhead Serial Data In, input.
19
OSDOCK
DO
OSDOCK.
Overhead Serial Data Out Clock, output.
18
OSDO
DO
OSDO.
Overhead Serial Data Out, output.
Table 1. LXP730 Pin Descriptions (Continued)
Pin
Symbol
Type
1
Description
1. AI = Analog Input; AO = Analog Output; DI = Digital Input; DO = Digital Output; NC = No Clamp. Pad will not clamp input in
the absence of power; PU = Input contains pull-up; PD = Input contains pull-down; I/O = Input/Output; OD = Open Drain
Output;
TO = Tri-State Output.
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