參數(shù)資料
型號: LXP730LE
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 62/70頁
文件大?。?/td> 1007K
代理商: LXP730LE
LXP730
Multi-Rate DSL Framer
62
Datasheet
5.13.4
FEBE Error Counter
Address: 26
Abbreviation: FEBE_ERR_CNT
Read/Write
5.13.5
CRC - FEBE - LOS Status
Address: 27
Abbreviation: CRC_FEBE_ST
Read/Write
5.13.6
MX Overhead Bits 1 - 8
Address: 28
Abbreviation: MXOH1
Read/Write
Table 60. CRC Error Counter
Bit
Name
Default
Description
<7:0>
CRC_ERR_
CNT <7:0>
0
CRC error counter, mode set by CRC mode bit in OVRHD_CFG
register.
Table 61. FEBE Error Counter
Bit
Name
Default
Description
<7:0>
FEBE_ERR_
CNT <7:0>
0
FEBE error counter, mode set by FEBE mode bit in OVRHD_CFG
register.
Table 62. CRC - FEBE Status
Bit
Name
Default
Description
7
CRC_OVR
0
1
when CRC error counter overflowed in reset mode. Must write
1
to reset.
6
FEBE_OVR
0
1
when FEBE error counter overflowed in reset mode. Must write
1
to reset.
5
CRCERRINJ
0
CRC Error Injection; when this bit is set to
1
a CRC will be injected,
then the LXP730 will clear this bit after 1 DSL frame.
4
MX_LOS
0
1
when LOS occurs, affected by LOS_SEL in MISC_CTL.
<3:1>
n/a
000b
Reserved.
0
DSLACTIVE
0
DSL link active status -- reports current status.
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