Datasheet
7
Multi-Rate DSL Framer
—
LXP730
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
Version................................................................................................................57
ADPLL Control 1 .................................................................................................57
ADPLL Control 2 .................................................................................................58
PROG Divide.......................................................................................................58
Programmable Idle Code Byte ............................................................................59
PCM 1 Configuration Bits....................................................................................59
PCM 2 Configuration Bits....................................................................................60
Codec Configuration............................................................................................60
Miscellaneous Control.........................................................................................60
Overhead Configuration......................................................................................61
CRC Error Counter..............................................................................................62
FEBE Error Counter............................................................................................62
CRC - FEBE Status.............................................................................................62
MX Overhead Bits 1 - 8.......................................................................................63
MX Overhead Bits 9 - 16.....................................................................................63
MX Overhead Bits 17 - 24...................................................................................63
MX Overhead Bits 25 - 32...................................................................................64
MX Z Bits 1 - 8.....................................................................................................64
MX Z Bits 9 - 16...................................................................................................64
MX Z Bits 17 - 24.................................................................................................64
MX Z Bits 25 - 32.................................................................................................65
MX Z Bits 33 - 40.................................................................................................65
MX Z Bits 41 - 48.................................................................................................65
DX Overhead Bits 1 - 8 .......................................................................................66
DX Overhead Bits 9 - 16 .....................................................................................66
DX Overhead Bits 17 - 24 ...................................................................................66
DX Overhead Bits 25 - 32 ...................................................................................67
DX Z Bits 1 - 8.....................................................................................................67
DX Z Bits 9 - 16...................................................................................................67
DX Z Bits 17 - 24.................................................................................................67
DX Z Bits 25 - 32.................................................................................................68
DX Z Bits 33 - 40.................................................................................................68
DX Z Bits 41 - 48.................................................................................................68
Reserved Registers.............................................................................................68
Interrupt Enables.................................................................................................69
Interrupt Status....................................................................................................69