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參數(shù)資料
| 型號： | LXP710PE |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 59/84頁 |
| 文件大?。?/td> | 1108K |
| 代理商： | LXP710PE |
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HDSL Framer/Mapper for 1168 kbps Applications
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LXP710
Datasheet
59
Loop 3 BPV Error Counter
Address: 79
Abbreviation: DXL3BPVEC
Read
Loop 3 QRSS Test Pattern Error Counter (2 bytes)
Address: 7A
Abbreviation: L3PATECH
Read
Address: 7B
Abbreviation: L3PATECL
Read
Table 106. Demux Loop 3 FEBE Error Count
Bit
Name
Default
Description
<7:0>
FEBE3EC<7:0>
0
Demux Loop 3 FEBE Error Counter. This 8-bit counter increments each time
one or more errors are detected on the demux Loop 3 FEBE bits. After a
microprocessor read, the counter is cleared. This counter is disabled when the
LOSW3 signal is High, and automatically stops at 0FFh to prevent overflow.
Table 107. Demux Loop 3 BPV Error Count
Bit
Name
Default
Description
<7:0>
BPV3EC<7:0>
0
Demux Loop 3 BPV Error Counter. This 8-bit counter increments each time
one or more errors are detected on the demux Loop 3 BPV bits. After a
microprocessor read, the counter is cleared. This counter is disabled when the
LOSW3 signal is High, and automatically stops at 0FFh to prevent overflow.
Table 108. Loop 3 QRSS Test Pattern Error Counter (High byte)
Bit
Name
Default
Description
<7:0>
PAT3EC<15:8>
0
Loop 3 Test Pattern Error Counter (High byte). This 16-bit counter increments
each time the demux test pattern receiver detects a pattern error. When the
upper byte is read, the current count of both bytes is latched and the counter is
cleared. This counter is disabled when pattern sync is lost. This counter does
not stop counting at 0FFFFh, however, a latched overflow status bit is
provided in the General Interrupt Vector Status register.
Table 109. Loop 3 QRSS Test Pattern Error Counter (Low byte)
Bit
Name
Default
Description
<7:0>
PAT3EC<7:0>
0
Loop 3 Test Pattern Error Counter (Low byte). The lower byte is latched
when the upper byte is read. Therefore, this byte must be read last when
reading the 16-bit Pattern Error Counter.
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