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參數(shù)資料
| 型號(hào)： | LXP710PE |
| 元件分類(lèi)： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁(yè)數(shù)： | 65/84頁(yè) |
| 文件大?。?/td> | 1108K |
| 代理商： | LXP710PE |
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HDSL Framer/Mapper for 1168 kbps Applications
—
LXP710
Datasheet
65
4.4
System Software Guidelines
Many implementations of HDSL systems contain a microprocessor per board which controls the
operation of one framer and up to three data pumps. This processor usually also communicates
with another in the rack that contains the board. Though there are other possibilities, this is usually
a good compromise of providing the necessary computing power and local control of the devices
on the board. At first glance the software required run a HDSL system seems complex, but let
’
s
break it down to some operational modes. These modes can be: 1.) board initialization, 2.) loop
activation, 3.) normal operation, 4.) diagnostic operation and 5.) external communication mode.
The following discussion outlines the major tasks needed for a HDSL system, but not all the details
necessary for a complete system.
Figure 9. Point-to-Multipoint E1 HDSL System
Data Pump 1
LXT305A
E1 LIU
DS2181A
E1 Framer
LXP710
SK70707/8
HDX
SK70704
ACC
Microprocessor
E1 Line
RTIP
RRING
TTIP
TRING
RPOS
RNEG
RCLK
TCLK
TPOS
TNEG
TPOS
TNEG
TCLK
RCLK
RNEG
RPOS
TSER
TFSYNC
RSER
RFSYNC
TDATA
TFP
RDATA
RFP
LOSW
ICLK
ICLK1
LOSW1
LP1DTI
RFP1
TFP1
LP1DTO
E1DATI
E1FRMI
E1CLKI
E1CLKO
E1DATO
E1FRMO
Data Pump 2
SK70707/8
HDX
SK70704
ACC
ICLK
LOSW
RFP
RDATA
TFP
TDATA
LP2DTO
TFP2
LP2DTI
RFP2
LOSW2
ICLK2
Data Pump 3
SK70707/8
HDX
SK70704
ACC
ICLK
LOSW
RFP
RDATA
TFP
TDATA
LP3DTO
TFP3
LP3DTI
RFP3
LOSW3
ICLK3
HDSL Lines
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