參數(shù)資料
型號(hào): IT8673F
廠商: Electronic Theatre Controls, Inc.
英文描述: GT 35C 35#12 SKT PLUG
中文描述: 先進(jìn)的輸入/輸出(高級(jí)I / O)的初步規(guī)范V0.5
文件頁(yè)數(shù): 85/128頁(yè)
文件大?。?/td> 780K
代理商: IT8673F
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IT8673F
5
Table 11-26. Interrupt Enable Register Description
Bit
Default
Description
7-4
-
Reserved
3
0
Enable MODEM Status Interrupt
Sets this bit high to enable the Modem Status Interrupt when one of the
Modem Status Registers changes its bit status.
Enable Receiver Line Status Interrupt
2
0
Sets this bit high to enable the Receiver Line Status Interrupt which is caused
when Overrun, Parity, Framing or Break occurs.
Enable Transmitter Holding Register Empty Interrupt
Sets this bit high to enable the Transmitter Holding Register Empty Interrupt.
Enable Received Data Available Interrupt
Sets this bit high to enable the Received Data Available Interrupt and Time-out
interrupt in the FIFO mode.
1
0
0
0
(2) Interrupt Identification Register (IIR) (Read only, Address offset=2)
This register facilitates the host CPU to determine interrupt priority and its source. The priority of four
existing interrupt levels is listed below:
1. Received Line Status (highest priority)
2. Received Data Ready
3. Transmitter Holding Register Empty
4. Modem Status (lowest priority)
When a privileged interrupt is pending and the type of interrupt is stored in the IIR which is accessed by the
Host, the serial channel holds back all interrupts and indicates the pending interrupts with the highest
priority to the Host. Any new interrupts will not be acknowledged until the Host access is completed. The
contents of the IIR are described in the table on the next page:
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IT8687R 制造商:ITE 功能描述:
IT86B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220
IT86C 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220
IT86F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220
IT86G 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220