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參數(shù)資料
| 型號： | IT8673F |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | GT 35C 35#12 SKT PLUG |
| 中文描述： | 先進的輸入/輸出（高級I / O）的初步規(guī)范V0.5 |
| 文件頁數(shù)： | 7/128頁 |
| 文件大?。?/td> | 780K |
| 代理商： | IT8673F |
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10.11.33 SMI# Status Register 1 (Index=E2h, Default=00h)..................................................................39
10.11.34 SMI# Status Register 2 (Index=E3h, Default=00h)..................................................................40
11. Functional Description.............................................................................................................................41
11.1 General Purpose I/O...........................................................................................................................41
11.2 Advanced Power Supply Control and PME# ......................................................................................42
11.3 FAN Controller ....................................................................................................................................42
11.3.1
Interfaces.....................................................................................................................................43
11.3.2
Registers......................................................................................................................................43
11.3.3
Operation.....................................................................................................................................47
11.4 Floppy Disk Controller (FDC)..............................................................................................................47
11.4.1
Introduction..................................................................................................................................47
11.4.2
Reset............................................................................................................................................47
11.4.3
Hardware Reset (RESET Pin).....................................................................................................48
11.4.4
Software Reset (DOR Reset and DSR Reset) ............................................................................48
11.4.5
Digital Data Separator .................................................................................................................48
11.4.6
Write Precompensation ...............................................................................................................48
11.4.7
Data Rate Selection.....................................................................................................................48
11.4.8
Status, Data and Control Registers.............................................................................................48
11.4.9
Controller Phases ........................................................................................................................52
11.4.10 Command Set..............................................................................................................................56
11.4.11 Data Transfer Commands ...........................................................................................................66
11.4.12 Control Commands......................................................................................................................69
11.4.13 DMA Transfers.............................................................................................................................73
11.4.14 Low Power Mode.........................................................................................................................73
11.5 Serial Port (UART) Description...........................................................................................................74
11.5.1
Data Registers.............................................................................................................................74
11.5.2
Control Registers: IER, IIR, FCR, DLL, DLM, LCR and MCR.....................................................74
11.5.3
Status Registers: LSR and MSR .................................................................................................81
11.5.4
Reset............................................................................................................................................83
11.5.5
Programming ...............................................................................................................................83
11.5.6
Software Reset ............................................................................................................................83
11.5.7
Clock Input Operation..................................................................................................................83
11.5.8
FIFO Interrupt Mode Operation ...................................................................................................83
11.6 Parallel Port.........................................................................................................................................85
11.6.1
SPP and EPP Modes...................................................................................................................86
11.6.2
EPP Operation.............................................................................................................................87
11.6.3
ECP Mode....................................................................................................................................88
11.7 Keyboard Controller (KBC) .................................................................................................................96
11.7.1
Host Interface...............................................................................................................................96
11.7.2
Data Registers and Status Register ............................................................................................97
11.7.3
Keyboard and Mouse Interface....................................................................................................97
11.7.4
KIRQ and MIRQ...........................................................................................................................97
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