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參數(shù)資料
| 型號： | IT8673F |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | GT 35C 35#12 SKT PLUG |
| 中文描述： | 先進(jìn)的輸入/輸出（高級I / O）的初步規(guī)范V0.5 |
| 文件頁數(shù)： | 103/128頁 |
| 文件大小： | 780K |
| 代理商： | IT8673F |
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IT8673F
ECP function control register.
ecr(7)-ecr(5): These bits are used for
read/write
and Mode selection.
3
ecr(4): nErrIntrEn,
read/write
, Valid in ECP(011) Mode
1: Disables the interrupt generated on the asserting edge of the nFault input.
0: Enables the interrupt pulse on the asserting edge of the nFault. An interrupt pulse will be generated if
nFault is asserted, or if this bit is written from “1” to “0” in the low level nFault.
ecr(3): dmaEn,
read/write
1: Enables DMA. DMA starts when serviceIntr (ecr(2)) is 0.
0: Disables DMA unconditionally.
ecr(2): serviceIntr,
read/write
1: Disables DMA and all service interrupts.
0: Enables the service interrupts. This bit will be set to 1 by hardware when one of the three service
interrupts has occurred. Writing “1” to this bit will not generate an interrupt.
Case 1: dmaEn=1
During DMA, this bit is set to “1” (a service interrupt generated) if the terminal count is reached.
Case 2: dmaEn=0, dcr(5)=0
This bit is set to “1” (a service interrupt generated) whenever there is writeiIntrThreshold or more
space-free bytes in the FIFO.
Case 3: dmaEn=0, dcr(5)=1
This bit is set to 1 (a service interrupt generated) whenever there is READIntrThreshold or more valid bytes
to be read from the FIFO.
ecr(1): full,
read only
1: The FIFO is full and cannot accept another byte.
0: The FIFO has at least one free data byte space.
ecr(0): empty,
read only
1: The FIFO is empty.
0: The FIFO contains at least one data byte.
(14) Mode Switching Operation
In programmed I/O control (mode 000 or 001), P1284 negotiation and all other tasks happening before
data are transferred, and are controlled by software. Setting mode to 011 or 010 will cause the hardware to
perform an automatic control-line handshaking and transferring information between the FIFO and the
ECP port.
From mode 000 or 001, any other mode may be immediately switched to or any other mode. To change
directions, the mode must first be set to 001.
In extended forward mode, the FIFO must be cleared and all signals deasserted before returning to mode
000 or 001. In the ECP reverse mode, all data must be read from the FIFO before returning to mode 000 or
001. Unneeded data are usually accumulated during ECP reverse handshaking, as when the mode is
changed during a data transfer. If the above condition is satisfied, nAutoFd will be deasserted regardless
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IT8687R | 制造商:ITE 功能描述: |
| IT86B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220 |
| IT86C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220 |
| IT86F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220 |
| IT86G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220 |
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