參數(shù)資料
型號： IT8673F
廠商： Electronic Theatre Controls, Inc.
英文描述： GT 35C 35#12 SKT PLUG
中文描述： 先進(jìn)的輸入/輸出（高級I / O）的初步規(guī)范V0.5
文件頁數(shù)： 57/128頁
文件大小： 780K
代理商： IT8673F
IT8673F
11.3.3 Operation
7
47
11.3.3.1
When the system power is first applied, the FAN Controller performs a “power on reset” on the registers
which are returned to default values (due to system hardware reset).
Power On RESET and Software RESET
11.3.3.2
The Fan Tachometer inputs gate a 22.5 kHz clock into an 8-bit counter (maximum count=255) for one
period of the input signals. Several divisors, located in FAN Divisor Register, are provided for FAN_TAC1
and FAN_TAC2, and are used to modify the monitoring range. FAN_TAC3 is not adjustable, and its divisor
value is always set to 2. Counts are based on 2 pulses per resolution tachometer output.
RPM = 1.35 X 10
6
/ (Count X Divisor)
The maximum input signal range is from 0 to VCC. The additional application is needed to clamp the input
voltage and current.
Fan Tachometer
11.3.3.3
The IT8673F provides advanced FAN Controllers. Two modes are provided for each controller: ON_OFF
and PWM modes. The former is a logical ON or OFF, and the latter is a PWM output. With the addition of
external application, the Fan’s voltage values can be varied easily.
11.4 Floppy Disk Controller (FDC)
11.4.1 Introduction
The Floppy Disk Controller provides the interface between a host processor and up to two floppy disk
drives. It integrates a controller and a digital data separator with write precompensation, data rate selection
logic, microprocessor interface, and a set of registers.
The FDC supports data transfer rates of 250 Kbps, 300 Kbps, 500 Kbps, and 1 Mbps. It operates in PC/AT
mode and supports 3-Mode type drives. Additionally, the FDC is software compatible with the 82077.
The FDC configuration is handled by software and a set of Configuration registers. Status, Data, and
Control registers facilitate the interface between the host microprocessor and the disk drive, providing
information about the condition and/or state of the FDC. These configuration registers can select the data
rate, enable interrupts, drives, and DMA modes, and indicate errors in the data or operation of the
FDC/FDD.
The controller manages data transfers using a set of data transfer and control commands. These
commands are handled in three phases: Command, Execution, and Result. Not all commands utilize all
these three phases.
Fan Controller ON-OFF and SmartGuardian Modes
11.4.2 Reset
The IT8673F device implements both software and hardware reset options for the FDC. Either type of the
resets will reset the FDC, terminating all operations and placing the FDC into an idle state. A reset during a
write to the disk will corrupt the data and the corresponding CRC.
相關(guān)PDF資料
PDF描述
IT8687R GT 35C 35#12 SKT PLUG
ITC1000 GT 85C 85#16 SKT PLUG
ITF86130SK8T N-Channel, Logic Level, Power MOSFET(N溝道邏輯電平功率MOS場效應(yīng)管)
ITF86182SK8T 11A, 30V, 0.0115 Ohm, P-Channel, Logic Level, Power MOSFET
ITF87012SVT 6A, 20V, 0.035 Ohm, N-Channel,2.5V Specified Power MOSFET(6A, 20V, 0.035Ω N溝道2.5V專用功率MOS場效應(yīng)管)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IT8687R 制造商:ITE 功能描述:
IT86B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220
IT86C 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220
IT86F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220
IT86G 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRIAC|600V V(DRM)|8A I(T)RMS|TO-220
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