
R8C/3GM Group
31. Flash Memory
R01UH0284EJ0100 Rev.1.00
Aug 09, 2011
31.4.1
Flash Memory Status Register (FST)
Notes:
1. The RDYSTI bit cannot be set to 1 (flash ready status interrupt request) by a program.
When writing 0 (no flash ready status interrupt request) to the RDYSTI bit, read this bit (dummy read) before
writing to it.
Make sure the DTC is not activated by the flash ready status source between reading and writing.
To confirm this bit, set the RDYSTIE bit in the FMR0 register to 1 (flash ready status interrupt enabled).
2. The BSYAEI bit cannot be set to 1 (flash access error interrupt request) by a program.
When writing 0 (no flash access error interrupt request) to the BSYAEI bit, read this bit (dummy read) before
writing to it.
To confirm this bit, set the BSYAEIE bit in the FMR0 register to 1 (flash access error interrupt enabled) or set the
CMDERIE bit in the FMR0 register to 1 (erase/write error interrupt enabled).
3. This bit is also set to 1 (error) when a command error occurs.
4. When this bit is set to 1, do not set the FMR01 bit in the FMR0 register to 0 (CPU rewrite mode disabled).
RDYSTI Bit (Flash Ready Status Interrupt Request Flag)
When the RDYSTIE bit in the FMR0 register is set to 1 (flash ready status interrupt enabled) and auto-
programming or auto-erasure completes, or erase-suspend mode is entered, the RDYSTI bit is set to 1 (flash
ready status interrupt request).
During interrupt handling, set the RDYSTI bit to 0 (no flash ready status interrupt request).
[Condition for setting to 0]
Set to 0 by an interrupt handling program.
[Condition for setting to 1]
When the flash memory status changes from busy to ready while the RDYSTIE bit in the FRMR0 register is set
to 1, the RDYSTI bit is set to 1.
The status is changed from busy to ready in the following states:
Completion of erasing/programming the flash memory
Suspend acknowledgement
Completion of forcible termination
Completion of the lock bit program
Completion of the read lock bit status
Completion of the block blank check
When the flash memory can be read after it is released from stop state.
Address 01B2h
Bit
b7b6b5
b4b3b2
b1b0
Symbol
After Reset
100
00
X
0
Bit
Symbol
Bit Name
Function
R/W
b0
RDYSTI Flash ready status interrupt request
0: No flash ready status interrupt request
1: Flash ready status interrupt request
R/W
b1
BSYAEI Flash access error interrupt request
0: No flash access error interrupt request
1: Flash access error interrupt request
R/W
b2
LBDATA LBDATA monitor flag
0: Locked
1: Not locked
R
b3
—
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b4
FST4
0: No program error
1: Program error
R
b5
FST5
Erase error/blank check error flag
(3)0: No erase error/blank check error
1: Erase error/blank check error
R
b6
FST6
Erase-suspend status flag
0: Other than erase-suspend
1: During erase-suspend
R
b7
FST7
Ready/busy status flag
0: Busy
1: Ready
R