
R8C/3GM Group
9. Clock Generation Circuit
R01UH0284EJ0100 Rev.1.00
Aug 09, 2011
9.2.3
System Clock Control Register 3 (CM3)
Notes:
1. When the MCU exits wait mode by a peripheral function interrupt, the CM30 bit is set to 0 (other than wait mode).
2. Set the CM35 bit to 0 in stop mode. When the MCU enters wait mode, if the CM35 bit is set to 1 (no division), the
CM06 bit in the CM0 register is set to 0 (bits CM16 and CM17 enabled) and bits CM17 and CM16 in the CM1
register is set to 00b (no division mode).
3. When the high-speed on-chip oscillator mode is selected as the system clock, do not enter stop mode under this
setting.
4. When bits CM37 and CM36 are set to 11b (XIN clock selected), the following will be set when the MCU exits wait
mode or stop mode.
CM05 bit in CM0 register = 0 (XIN clock oscillates)
CM13 bit in CM1 register = 1 (XIN-XOUT pin)
OCD2 bit in OCD register = 0 (XIN clock selected)
When the MCU enters wait mode while the CM05 bit in the CM0 register is 1 (XIN clock stops), if the XIN clock is
selected as the CPU clock when exiting wait mode, set the CM06 bit to 1 (divide-by-8 mode) and the CM35 bit to
0.
However, if an externally generated clock is used as the XIN clock, do not set bits CM37 to CM36 to 11b (XIN
clock selected).
5. When the low-speed clock mode is selected for the system clock, do not enter wait mode or stop mode under
this setting.
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the CM3 register.
CM30 bit (Wait Control Bit)
When the CM30 bit is set to 1 (MCU enters wait mode), the CPU clock stops (wait mode). Since the XIN clock,
XCIN clock, and the on-chip oscillator clock do not stop, the peripheral functions using these clocks continue
operating. To set the CM30 bit to 1, set the I flag to 0 (maskable interrupt disabled).
The MCU exits wait mode by a reset or peripheral function interrupt. When the MCU exits wait mode by a
peripheral function interrupt, it resumes executing the instruction immediately after the instruction to set the
CM30 bit to 1.
When the MCU enters wait mode with the WAIT instruction, make sure to set the I flag to 1 (maskable interrupt
enabled). With this setting, interrupt handling is performed by the CPU when the MCU exits wait mode.
Address 0009h
Bit
b7b6b5
b4b3b2
b1b0
Symbol
After Reset
000
00
Bit
Symbol
Bit Name
Function
R/W
b0
CM30
0: Other than wait mode
1: MCU enters wait mode
R/W
b1
—
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b2
—
b3
—
Reserved bits
Set to 0.
R/W
b4
—
b5
CM35
CPU clock division when exiting
0: Following settings are enabled:
CM06 bit in CM0 register
Bits CM16 and CM17 in CM1 register
1: No division
R/W
b6
CM36
System clock when exiting wait
mode or stop mode select bit
b7 b6
0 0: MCU exits with the CPU clock immediately
before entering wait or stop mode.
(3)0 1: Do not set.
1 0: Do not set.
1 1: XIN clock selected
(4, 5)R/W
b7
CM37
R/W