
R8C/3GM Group
14. Watchdog Timer
R01UH0284EJ0100 Rev.1.00
Aug 09, 2011
14.2.6
Option Function Select Register (OFS)
Notes:
1. The OFS register is allocated in the flash memory, not in the SFRs. Set appropriate values as ROM data by a
program.
Do not write additions to the OFS register. If the block including the OFS register is erased, the OFS register is
set to FFh.
When blank products are shipped, the OFS register is set to FFh. It is set to the written value after written by the
user.
When factory-programming products are shipped, the value of the OFS register is the value programmed by the
user.
2. The same level of the voltage detection 0 level selected by bits VDSEL0 and VDESL1 is set in both functions of
voltage monitor 0 reset and power-on reset.
3. To use power-on reset and voltage monitor 0 reset, set the LVDAS bit to 0 (voltage monitor 0 reset enabled after
reset).
For a setting example of the OFS register, refer to 13.3.1 Setting Example of Option Function Select Area.
LVDAS Bit (Voltage Detection 0 Circuit Start Bit)
The Vdet0 voltage to be monitored by the voltage detection 0 circuit is selected by bits VDSEL0 and VDSEL1.
Address 0FFFFh
Bit
b7
b6b5b4
b3b2
b1b0
Symbol CSPROINI
LVDAS
VDSEL1 VDSEL0 ROMCP1 ROMCR
—
WDTON
After Reset
User Setting Value (1)
Bit
Symbol
Bit Name
Function
R/W
b0
WDTON
Watchdog timer start select bit
0: Watchdog timer automatically starts after reset
1: Watchdog timer is stopped after reset
R/W
b1
—
Reserved bit
Set to 1.
R/W
b2
ROMCR
ROM code protect disable bit
0: ROM code protect disabled
1: ROMCP1 bit enabled
R/W
b3
ROMCP1 ROM code protect bit
0: ROM code protect enabled
1: ROM code protect disabled
R/W
b4
VDSEL0
Voltage detection 0 level select bit (2)
b5 b4
0 0: 3.80 V selected
(Vdet0_3)
0 1: 2.85 V selected
(Vdet0_2)
1 0: 2.35 V selected
(Vdet0_1)
1 1: 1.90 V selected
(Vdet0_0)
R/W
b5
VDSEL1
R/W
b6
LVDAS
Voltage detection 0 circuit start bit (3)
0: Voltage monitor 0 reset enabled after reset
1: Voltage monitor 0 reset disabled after reset
R/W
b7
CSPROINI Count source protection mode
after reset select bit
0: Count source protect mode enabled after reset
1: Count source protect mode disabled after reset
R/W