
R8C/3GM Group
9. Clock Generation Circuit
R01UH0284EJ0100 Rev.1.00
Aug 09, 2011
9.4
On-Chip Oscillator Clock
The on-chip oscillator clock is supplied by the on-chip oscillator (high-speed on-chip oscillator or low-speed on-
chip oscillator). This clock is selected by the FRA01 bit in the FRA0 register.
9.4.1
Low-Speed On-Chip Oscillator Clock
The clock generated by the low-speed on-chip oscillator is used as the clock source for the CPU clock,
peripheral function clock, fOCO, fOCO-S, and fOCO128.
After a reset, the on-chip oscillator clock generated by the low-speed on-chip oscillator divided by 1 (no
division) is selected as the CPU clock.
If the XIN clock stops oscillating when bits OCD1 to OCD0 in the OCD register are set to 11b, the low-speed
on-chip oscillator automatically starts operating and supplies the necessary clock for the MCU.
The frequency of the low-speed on-chip oscillator varies depending on the supply voltage and the operating
ambient temperature. Application products must be designed with sufficient margin to allow for frequency
changes.
9.4.2
High-Speed On-Chip Oscillator Clock
The clock generated by the high-speed on-chip oscillator is used as the clock source for the CPU clock,
peripheral function clock, fOCO, fOCO-F, fOCO40M, and fOCO128.
To use the high-speed on-chip oscillator clock as the clock source for the CPU clock, peripheral clock, fOCO,
and fOCO-F, set bits FRA20 to FRA22 in the FRA2 register as follows:
All division mode can be set when VCC = 2.7 V to 5.5 V
000b to 111b
Divide ratio of 8 or more when VCC = 1.8 V to 5.5 V
110b to 111b (divide by 8 or more)
After a reset, the on-chip oscillator clock generated by the high-speed on-chip oscillator stops. Oscillation is
started by setting the FRA00 bit in the FRA0 register to 1 (high-speed on-chip oscillator on).
Frequency correction data is stored in registers FRA4 to FRA7.
To adjust the frequency of the high-speed on-chip oscillator clock to 36.864 MHz, first transfer the correction
value in the FRA4 register to the FRA1 register and the correction value in the FRA5 register to the FRA3
register before using the values. This enables the setting errors of bit rates such as 9600 bps and 38400 bps to be
0% when the serial interface is used in UART mode (refer to Tables 21.8 and 22.8 Bit Rate Setting Example in UART Mode).
To adjust the frequency of the high-speed on-chip oscillator clock to 32 MHz, first transfer the correction value
in the FRA6 register to the FRA1 register and the correction value in the FRA7 register to the FRA3 register
before using the values.