
R8C/3GM Group
22. Serial Interface (UART2)
R01UH0284EJ0100 Rev.1.00
Aug 09, 2011
22.2.7
UART2 Digital Filter Function Select Register (URXDF)
Note:
1. The RXD2 digital filter can be used only in clock asynchronous serial I/O (UART) mode. When bits SMD2 to
SMD0 in the U2MR register are set to 001b (clock synchronous serial I/O mode) or 010b (I2C mode), set the
DF2EN bit to 0 (RXD2 digital filter disabled).
22.2.8
UART2 Special Mode Register 5 (U2SMR5)
Note:
1. When the MP bit is set to 1 (multiprocessor communication enabled), the settings of bits PRY and PRYE in the
U2MR register are disabled. If bits SMD2 to SMD0 in the U2MR register are set to 001b (clock synchronous
serial I/O mode), set the MP bit to 0 (multiprocessor communication disabled).
Address 00B0h
Bit
b7b6b5
b4b3b2
b1b0
Symbol
After Reset
000
00
Bit
Symbol
Bit Name
Function
R/W
b0
—
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b1
—
b2
DF2EN
RXD2 digital filter enable bit
(1)0: RXD2 digital filter disabled
1: RXD2 digital filter enabled
R/W
b3
—
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b4
—
b5
—
b6
—
b7
—
Address 00BBh
Bit
b7b6b5
b4b3b2
b1b0
Symbol
After Reset
000
00
Bit
Symbol
Bit Name
Function
R/W
b0
MP
Multiprocessor communication
enable bit
0: Multiprocessor communication disabled
1: Multiprocessor communication enabled
(1)R/W
b1
—
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b2
—
b3
—
b4
MPIE
Multiprocessor communication
control bit
This bit is enabled when the MP bit is set to 1
(multiprocessor communication enabled).
When the MPIE bit is set to 1, the following will
result:
Receive data in which the multiprocessor bit is 0
is ignored. Setting of the RI bit in the U2C1
register and bits OER and FER in the U2RB
register to 1 is disabled.
On receiving receive data in which the
multiprocessor bit is 1, the MPIE bit is set to 0 and
receive operation other than multiprocessor
communication is performed.
R/W
b5
—
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b6
—
b7
—
Reserved bit
Set to 0.
R/W