
R8C/3GM Group
9. Clock Generation Circuit
R01UH0284EJ0100 Rev.1.00
Aug 09, 2011
9.2
Registers
9.2.1
System Clock Control Register 0 (CM0)
Notes:
1. The CM05 bit stops the XIN clock when the high-speed on-chip oscillator mode or low-speed on-chip oscillator
mode is selected. This bit cannot be used to detect whether the XIN clock has stopped. To stop the XIN clock,
set the bits in the following order:
(a) Set bits OCD1 to OCD0 in the OCD register to 00b.
(b) Set the OCD2 bit to 1 (on-chip oscillator clock selected).
2. During external clock input, only the clock oscillation buffer stops and clock input is acknowledged.
3. Only when the CM05 bit is set to 1 (XIN clock stops) and the CM13 bit in the CM1 register is set to 0 (P4_6 and
P4_7), P4_6 and P4_7 can be used as I/O ports.
4. When the MCU enters stop mode, the CM06 bit is set to 1 (divide-by-8 mode).
5. To use P4_6 and P4_7 as I/O ports, set the CM13 bit in the CM1 register to 0 (I/O ports), the CM05 bit to 1 (XIN
clock stops), the CM04 bit to 0 (I/O ports), and the CM03 bit in the CM0 register to 1 (XCIN clock stops).
The P4_6 pin is shared with the XIN/XCIN pin, and the P4_7 pin is shared with the XOUT/XCOUT pin. These
pins cannot be used as I/O ports when using the on-chip oscillation circuit.
6. The CM04 bit can be set to 1 by a program but cannot be set to 0.
7. To use the XCIN clock, set the CM04 bit to 1.
8. Set the CM07 bit to 1 (XCIN clock) from 0 after setting the CM04 bit to 1 (XCIN-XCOUT pin) and allowing XCIN
clock oscillation to stabilize.
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the CM0 register.
Address 0006h
Bit
b7b6b5
b4b3b2
b1b0
Symbol
After Reset
001
010
00
Bit
Symbol
Bit Name
Function
R/W
b0
—
Reserved bits
Set to 0.
R/W
b1
CM01 XIN-XCIN switch bit
0: P4_6 and P4_7 set as XIN-XOUT pin
1: P4_6 and P4_7 set as XCIN-XCOUT pin
R/W
b2
CM02 Wait mode peripheral function clock
stop bit
0: Peripheral function clock does not stop in wait mode
1: Peripheral function clock stops in wait mode
R/W
b3
CM03 XCIN clock stop bit
0: XCIN clock oscillates
1: XCIN clock stops
R/W
b4
CM04 Port/XCIN-XCOUT switch bit
(5, 6)0: I/O ports P4_6 and P4_7
R/W
b5
CM05 XIN clock (XIN-XOUT) stop bit
(1, 3) 0: XIN clock oscillates
R/W
b6
CM06 CPU clock division select bit 0
(4)0: Bits CM16 and CM17 in CM1 register enabled
1: Divide-by-8 mode
R/W
b7
CM07 XIN, XCIN clock select bit
(8)0: XIN clock
1: XCIN clock
R/W