
R8C/3GM Group
9. Clock Generation Circuit
R01UH0284EJ0100 Rev.1.00
Aug 09, 2011
9.2.2
System Clock Control Register 1 (CM1)
Notes:
1. When the CM06 bit is set to 0 (bits CM16 and CM17 enabled), bits CM16 and CM17 are enabled.
2. If the CM10 bit is set to 1 (stop mode), the on-chip feedback resistor is disabled.
3. When the OCD2 bit is set to 0 (XIN clock selected), the CM14 bit can be set to 1 (low-speed on-chip oscillator
off). When the OCD2 bit is set to 1 (on-chip oscillator clock selected), the CM14 bit is set to 0 (low-speed on-chip
oscillator on). It remains unchanged even if 1 is written to it.
4. To use the voltage monitor 1 interrupt or voltage monitor 2 interrupt (when the digital filter is used), set the CM14
bit to 0 (low-speed on-chip oscillator on).
5. To use P4_6 and P4_7 as I/O ports, set the CM13 bit in the CM1 register to 0 (I/O ports), the CM05 bit to 1 (XIN
clock stops), the CM04 bit to 0 (I/O ports), and the CM03 bit in the CM0 register to 1 (XCIN clock stops).
The P4_6 pin is shared with the XIN/XCIN pin, and the P4_7 pin is shared with the XOUT/XCOUT pin. These
pins cannot be used as I/O ports when using the on-chip oscillation circuit.
6. Once the CM13 bit is set to 1 by a program, it cannot be set to 0.
7. Do not set the CM10 bit to 1 (stop mode) when the VCA20 bit in the VCA2 register to 1 (low consumption
enabled).
8. When the high-speed on-chip oscillator mode is selected as the system clock, do not enter stop mode while bits
CM37 and CM36 in the CM3 register is 00b (MCU exits with the CPU clock used immediately before entering
wait or stop mode).
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the CM1 register.
Address 0007h
Bit
b7b6b5
b4b3b2
b1b0
Symbol
After Reset
001
000
00
Bit
Symbol
Bit Name
Function
R/W
b0
CM10
0: Clock oscillates
1: All clocks stop (stop mode)
R/W
b1
CM11
XIN-XOUT on-chip feedback resistor
select bit
0: On-chip feedback resistor enabled
1: On-chip feedback resistor disabled
R/W
b2
CM12
XCIN-XCOUT on-chip feedback
resistor select bit
0: On-chip feedback resistor enabled
1: On-chip feedback resistor disabled
R/W
b3
CM13
Port/XIN-XOUT switch bit
(5, 6)0: I/O ports P4_6 and P4_7
1: XIN-XOUT pin
R/W
b4
CM14
Low-speed on-chip oscillator stop bit
0: Low-speed on-chip oscillator on
1: Low-speed on-chip oscillator off
R/W
b5
—
Reserved bit
Set to 1.
R/W
b6
CM16
CPU clock division select bit 1
(1)b7 b6
0 0: No division mode
0 1: Divide-by-2 mode
1 0: Divide-by-4 mode
1 1: Divide-by-16 mode
R/W
b7
CM17
R/W