參數(shù)資料
型號(hào)： 38D5
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 65/141頁(yè)
文件大?。?/td> 2027K
代理商： 38D5
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Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 65 of 134
38D5 Group
Fig. 63 State transitions of system clock
Frequency/2 mode
CM
4
X
IN
oscillation (frequency/2)
X
CIN
oscillation
OCO oscillation or stop
φ
=f(X
IN
)/
2
CM
7
=0
CM
6
=0
CM
5
=0
CM
4
=1
CM
3
=0 CM
8
=*
Frequency/8 mode
CM4
CM4
CM4
CM
5
CM5
CM5
X
IN
stop
X
CIN
oscillation
OCO stop
φ
=f(X
CIN
)/
2
CM
7
=0
CM
6
=1
CM
5
=1
CM
4
=1
CM
3
=1 CM
8
=1
CM5
(CM7)
CM3, CM8
(6)
On-chip oscillator mode
Low-speed mode
(6)
CM7
(6)
CM7
X
IN
oscillation
X
CIN
oscillation
OCO stop
φ
=f(X
CIN
)/
2
CM
7
=0
CM
6
=1
CM
5
=0
CM
4
=1
CM
3
=1 CM
8
=1
X
IN
stop
X
CIN
oscillation
OCO oscillation
φ
=f(OCO)/32
CM
7
=1
CM
6
=1
CM
5
=1
CM
4
=1
CM
3
=0 CM
8
=0
X
IN
oscillation
X
CIN
oscillation
OCO oscillation
φ
=f(OCO)/32
CM
7
=1
CM
6
=1
CM
5
=0
CM
4
=1
CM
3
=0 CM
8
=0
X
IN
oscillation
X
CIN
stop
OCO oscillation
φ
=f(OCO)/32
CM
7
=1
CM
6
=1
CM
5
=0
CM
4
=0
CM
3
=0 CM
8
=0
X
IN
stop
X
CIN
stop
OCO oscillation
φ
=f(OCO)/32
CM
7
=1
CM
6
=1
CM
5
=1
CM
4
=0
CM
3
=0 CM
8
=0
CM3, CM7,
CM8
(6)
CM
4
X
IN
oscillation (frequency/8)
X
CIN
oscillation
OCO oscillation or stop
φ
=f(X
IN
)/
8
CM
7
=0
CM
6
=1
CM
5
=0
CM
4
=1
CM
3
=0 CM
8
=*
X
IN
oscillation (frequency/8)
X
CIN
stop
OCO oscillation or stop
φ
=f(X
IN
)/
8
CM
7
=0
CM
6
=1
CM
5
=0
CM
4
=0
CM
3
=0 CM
8
=*
CM6
CM6
Reset release
Frequency/4 mode
CM4
X
IN
oscillation (frequency/4)
X
CIN
oscillation
OCO oscillation or stop
φ
=f(X
IN
)/
4
CM
7
=1
CM
6
=0
CM
5
=0
CM
4
=1
CM
3
=0 CM
8
=*
X
IN
oscillation
X
CIN
oscillation
OCO stop
φ
=f(X
CIN
)/
2
CM
7
=0
CM
6
=0
CM
5
=0
CM
4
=1
CM
3
=1 CM
8
=1
X
IN
oscillation
X
CIN
oscillation
OCO stop
φ
=f(X
CIN
)/
2
CM
7
=1
CM
6
=0
CM
5
=0
CM
4
=1
CM
3
=1 CM
8
=1
CM6
X
IN
oscillation (frequency/2)
X
CIN
stop
OCO oscillation or stop
φ
=f(X
IN
)/
2
CM
7
=0
CM
6
=0
CM
5
=0
CM
4
=0
CM
3
=0 CM
8
=*
X
IN
oscillation (frequency/4)
X
CIN
stop
OCO oscillation or stop
φ
=f(X
IN
)/
4
CM
7
=1
CM
6
=0
CM
5
=0
CM
4
=0
CM
3
=0 CM
8
=*
* : The OCO oscillating at “0”; the OCO stopped at “1”.
CM6
CM7
CM3
CM6
CM7
CM3
CM6
(CM7)
CM6
CM5
(CM7)
CM6
CM5
CM3
Notes 1:Switch the mode by the arrows shown between the mode blocks.
The all modes can be switched to the stop mode or the wait mode.
2:Timer and LCD operate in the wait mode. System is returned to the
source mode when the wait mode is ended.
3:The CM4 value is retained in the stop mode. When the stop mode is
ended, the operation mode varies as follows:
In the QzROM version: Mode set by the OSCSEL pin state
In the flash memory version: On-chip oscillator mode
The input level applied to the OSCSEL pin is determined when executing
the STP instruction.
4:Before executing the STP instruction, set the values to generate the
wait time required for oscillation stabilization to timer 1 and timer 2, and
set to "0" (interrupts disabled) to the interrupt enable bits of timer 1
and timer 2.
5:Execute the transition after the oscillation used in the destination mode
is stabilized.
6:When system goes to on-chip oscillator mode, the oscillation stabilizing
wait time is not needed.
7:The on-chip oscillator can be stopped in all kinds of state of frequency/
2,4 mode.
8:In all X
IN
mode, stop of on-chip oscillator is enabled.
9:The example assumes that 8 MHz is being applied to the X
IN
pin and 32
kHz to the X
CIN
pin. f(OCO) indicates the oscillation frequency of on-
chip oscillator.
10:When selecting the on-chip oscillator for the WDT clock, the on-chip
oscillator does not stop.
Also, in low-speed mode, the on-chip oscillator stops in the QzROM
version regardless of the on-chip oscillator stop bit value. The on-chip
oscillator does not stop in the flash memory version, so set this bit to
"1" to stop the oscillation.
In on-chip oscillator mode, even if this bit is set to "1", the on-chip
oscillator oscillation does not stop in the flash memory version, but
stops in the QzROM version.
11:In low-speed mode, the X
CIN
-X
COUT
oscillation stops if the port X
C
switch bit is set to "0".
12:In X
IN
mode, the X
IN
-X
OUT
oscillation does not stop even if the X
IN
-
X
OUT
oscillation stop bit is set to "1".
13:12.5 MHz
<
f(X
IN
)
≤
16 MHz is not available in the frequency/2 mode.
14:In the flash memory version, set the on-chip oscillator stop bit to "1"
(oscillation stops) because OCO is in the state set by the setting value
of the on-chip oscillator stop bit.
On-chip oscillator stop bit
0 : Oscillating
1 : Stopped
Not used (do not write “1”)
Not used
(returns “0” when read)
Not used (do not write “1”)
Processor mode bits
b1 b0
0 0 : Single-chip mode
0 1 :
1 0 :
1 1 :
Stack page selection bit
0 : 0 page
1 : 1 page
Internal system clock selection bit
0 : Main clock selected
(includes OCO, X
IN
)
1 : X
CIN
–
X
COUT
selected
Port Xc switch bit
0 : I/O port function (Oscillation stop)
1 : X
CIN
–
X
COUT
oscillating function
X
IN
–
X
OUT
oscillation stop bit
0 : Oscillating
1 : Stopped
Main clock division ratio selection bit
(Valid only when CM3=0)
b7 b8
0 0 : f(X
IN
)/2 (frequency/2 mode)
0 1 : f(X
IN
)/8 (frequency/8 mode)
1 0 : f(X
IN
)/4 (frequency/4 mode)
1 1 : On-chip oscillator
b7
b0
CPU mode register 2
CPUM2
(address 0011
16
, QzROM version, OSCSEL=L,
(
QzROM version, OSCSEL=H,
(
Flash memory version,
initial value: 00
16
)
initial value: 01
16
)
initial value: 00
16
)
CM8
b7
b0
CPU mode register
CPUM
(address 003B
16
, QzROM version, OSCSEL=L,
(
QzROM version, OSCSEL=H,
(
Flash memory version,
initial value: E0
16
)
initial value: 40
16
)
initial value: E0
16
)
CM0
CM1
CM2
CM3
CM4
CM5
CM6
CM7
Not available
(13)
QzROM version
Flash memory version
OSCSEL=L
QzROM version
OSCSEL=H
(14)
(12)
(11)
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