參數(shù)資料
型號(hào)： 38D5
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 41/141頁
文件大?。?/td> 2027K
代理商： 38D5
Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 41 of 134
38D5 Group
Fig. 31 Block diagram of Timer Y
Timer Y
Timer Y is a 16-bit timer. The timer Y count source can be
selected by setting the timer Y mode register. X
CIN
can be
selected as the count source.
When X
CIN
is selected as the count
source, counting can be performed regardless of X
IN
oscillation
or on-chip oscillator oscillation.
Four operating modes can be selected for timer Y by the timer Y
mode register. Also, the real time port can be controlled.
(1) Timer Mode
The timer Y count source can be selected by setting the timer Y
mode register.
(2) Period Measurement Mode
The interrupt request is generated at rising or falling edge of
CNTR
1
pin input signal. Simultaneously, the value in timer Y
latch is reloaded in timer Y and timer Y continues counting.
Except for that, this mode operates just as in the timer mode.
The timer value just before the reloading at rising or falling of
CNTR
1
pin input is retained until the timer Y is read once after
the reload.
The rising or falling timing of CNTR
1
pin input is found by
CNTR
1
interrupt. When using this mode, set the port sharing the
CNTR
1
pin to input mode.
(3) Event Counter Mode
The timer counts signals input through the CNTR
1
pin.
Except for that, this mode operates just as in the timer mode.
When using this mode, set the port sharing the CNTR
1
pin to
input mode.
(4) Pulse Width HL Continuously Measurement Mode
The interrupt request is generated at both rising and falling edges
of CNTR
1
pin input signal. Except for that, this mode operates
just as in the period measurement mode. When using this mode,
set the port sharing the CNTR
1
pin to input mode.
(5) Real Time Port Control
When the real time port function is valid, data for the real time
port is output from ports P5
0
and P5
1
each time the timer Y
underflows.(However, if the real time port control bit is changed
from “0” to “1” after the data for real time port is set, data is
output independent of the timer Y operation.) When the data for
the real time port is changed while the real time port function is
valid, the changed data is output at the next underflow of timer Y.
Before using this function, set the P5
0
and P5
1
port direction
registers to output.
Data bus
Real time p“1”
Real time port 2
control bit
Q D
Latch
Q D
Latch
P5
1
direction
register
P5
1
latch
RTP
1
data for real
time port
P5
0
direction
register
P5
0
latch
RTP
0
data for real
time port
“1”
Timer Y (low-order) latch (8) Timer Y (high-order) latch (8)
“0”
1
active
CNTR
“10”
P5
1
/RTP
1
/AN
1
P5
0
/RTP
0
/AN
0
CNTR
1
Falling edge detection
Period measurement
mode
Timer Y
interrupt request
Pulse width HL continuous
measurement mode
Timer Y operating
mode bits
CNTR
1
interrupt request
Rising edge detection
Count source selection bit
Xc
IN
“1”
φ
SOURCE
Real time port 2 control bit
“0”
Timer Y mode register
Timer Y operating mode bits
“00”, “01”, “10”
“00”, “01”, “11”
“1”
“0”
“0”
“1”
“11”
“0”
Timer Y write control bit
Timer stop bit
“0”
“1”
Timer Y mode register
write signal
Real time port 1 control bit
Timer Y (low-order)(8)
Timer Y (high-order)(8)
Frequency divider
Timer Y dividing frequency selection bit
2
Note1
:
φ
SOURCE indicates the followings:
X
IN
input in the frequency/2, 4, or 8 mode
On-chip oscillator divided by 4 in the on-chip oscillator mode
Sub-clock in the low-speed mode
(1)
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