參數(shù)資料
型號: 38D5
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機
文件頁數(shù): 137/141頁
文件大?。?/td> 2027K
代理商: 38D5
(3/6)
REVISION HISTORY
38D5 Group Data Sheet
2.03
Aug 31, 2006
75
Table 16: Max. of f(
φ
) : 2
×
V
CC
– 4
4
Table 17: Test condition of V
T+
– V
T-
: V
CC
= 2.0 V on RESET
V
CC
= 2.0 V to 5.5
V on RESET
76
2.04
Feb 02, 2007
13, 60
Table 24
Limits of t
wH
(S
CLK2
), t
wL
(S
CLK2
): t
c
(S
CLK1
)/2–80
t
c
(S
CLK2
)/2–80
14
MEMORY
ROM: Description revised.
ROM Code Protect Address: Description revised and added.
Fig. 10: Reserved ROM area: FFD0
16
FFDB
16
15
Fig.8 and Fig.60: CPUM2 (bits 2 to 7) revised.
16
Direction Resisters: Description revised.
Fig.11: ROM correction enable register
ROM correction enable register(RCR)
23
Table 8: Terminations 1 and 2 of V
L3
revised.
25
Fig.13: PULL3 (bits 4 to 7), SEG2 (bits 4 to 7) revised.
31
Fig.19: INTEDGE(bit 6), ICON2(bit 7) revised.
34
Fig.25: revised.
35
Fig. 28: Note added and revised.
36
Fig. 27: TXCON(BITS 3,4) revised.
41
Fig. 36: Note added.
43
Fig.29: TYM(bits 2,3) revised.
[AD control Register], Fig.39:
43, 44
Fig. 38: Note added.
analog input selection bit
analog input pin selection bits
46
51
Fig. 45: 1/3 duty revised.
52
ROM CORRECTION FUNCTION: Description added.
Fig. 47: FFD0
16
FFDB
16
.
53
Fig. 49: Note added and revised.
54
Fig.40: LM2(bits 1 to 7) revised.
Fig.51: CKOUT(bits 2 to 7 ) revised.
59
Fig. 59: Note 3 added and circuit expression is revised.
Table 12: ESDA input
ESDA input/output
61
64 to 66
Fig. 63 to Fig. 66: Revised.
71
Precautions Regarding Overvoltage: Description revised and Fig. 73 added.
72
Table 13
V
CC
: Oscillation start voltage
When start oscillating
V
I
: OSCSEL added.
V
o
: Conditions added.
73
Table 14
V
IL
: OSCSEL added.
Note 3 revised.
75
Table 16: Note 4 revised.
78
Table 20
T
CONV
Limits: (Note)
(Notes 1, 2)
Note 2 revised.
Note: ...set f(X
IN
)
500 kHz
500 kHz
Table 22
tsu (R
X
D-S
CLK2
)
t
su
(S
IN2
-S
CLK2
)
80
Rev.
Date
Description
Page
Summary
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