參數(shù)資料
型號： 38D5
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 34/141頁
文件大?。?/td> 2027K
代理商： 38D5
Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 34 of 134
38D5 Group
TIMERS
8-Bit Timer
The 38D5 Group has four built-in 8-bit timers: Timer 1, Timer 2,
Timer 3, and Timer 4.
Each timer has the 8-bit timer latch. All timers are down-
counters.
When the timer reaches “00
16
”, the contents of the timer latch is
reloaded into the timer with the next count pulse. In this mode,
the interrupt request bit corresponding to that timer is set to “1”.
The count can be stopped by setting the stop bit of each timer to
“1”.
Fig. 25 Timer 1-4 block diagram
Timer 1 latch (8)
Timer 1 (8)
Timer 2 latch (8)
Timer 2 (8)
Timer 3 latch (8)
Timer 3 (8)
Timer 4 latch (8)
Timer 4 (8)
Timer 1 interrupt request
Timer 2 interrupt request
Timer 3 interrupt request
Timer 4 interrupt request
X
CIN
Data bus
Timer 1 count stop bit
10 bit
PWM1
circuit
1/2
Q
Q
S
T
Timer 4 operating
T
4OUT
output
edge switch bit
4
P7
Timer 4 output selection bit
P7
4
direction
register
P7
4
/PWM
1
/
T
4OUT
10 bit
PWM0
circuit
1/2
Q
Q
S
T
Timer 3 operating
T
3OUT
output
edge switch bit
P7
3
latch
Timer 3 output selection bit
Timer 3 output selection bit
P7
3
direction
register
P7
3
/PWM
0
/
T
3OUT
“00”
“01”
“10”
“00”
“01”
“1”
“0”
“01”
“10”
“00”
“0”
“1”
“1”
“0”
“0”
“1”
“1”
“0”
Clock for
Timer 1
Clock for
Timer 2
Clock for
Timer 3
Clock for
Timer 4
Timer 1
Timer 2
Timer 3
Timer 4
Frequency division
selection bits
(2 bits for each Timer)
C
8
The following values can be selected
the clock for Timer;
1/1, 1/2, 1/16, 1/256
Frequency divider
1/2
Q
Q
S
T
T
2OUT
output
edge switch bit
Timer 2 output selection bit
“0”
“1”
“10”
Timer Y
output
Timer 3 write control bit
PWM01 register (2)
PWM01 register (2)
Timer 4 write control bit
Timer 2 write control bit
Timer 1 count
source selection
bits
Timer 2 count
source selection
Timer 2 count stop bit
Timer 3 count source
selection bit
Timer 3 count stop bit
Timer 4 count source
selection bits
Timer 4 count stop bit
Timer 4 output selection bit
φ
SOURCE
“11”
f(X
IN
)
(1)
C
C
C
φ
Note1:
φ
SOURCE indicates the followings:
X
IN
input in the frequency/2, 4, or 8 mode
On-chip oscillator divided by 4 in the on-chip oscillator mode
Sub-clock in the low-speed mode
P7
2
direction
register
P7
2
/T
2OUT
/CKOUT
P7
2
latch
Timer 2 output selection bit
“
00
”
“
01
”
“
10
”
P7
2
clock output control bit
System
clock
φ
X
CIN
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