Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 20 of 134
38D5 Group
Table 9
List of I/O port function
Pin
Name
Input/Output
I/O format
Non-port function
Related SFRs
Ref.
No.
(1)
P0
0
/SEG
8
P0
7
/SEG
15
P1
0
/SEG
16
P1
7
/SEG
23
P2
0
/SEG
0
/(KW
4
)
P2
3
/SEG
3
/(KW
7
)
Port P0
Input/Output,
individual bits
Input/Output,
individual bits
Input/Output,
individual bits
CMOS compatible input level
CMOS 3-state output
CMOS compatible input level
CMOS 3-state output
CMOS compatible input level
CMOS 3-state output
LCD segment output
Segment output disable register 0
Port P1
Segment output disable register 2
Port P2
Key input
(key-on
wakeup)
interrupt
input
Segment output disable register 1
Key input control register
(2)
P2
4
/SEG
4
P2
7
/SEG
7
P3
0
/SEG
24
P3
7
/SEG
31
P4
0
/R
X
D
P4
1
/T
X
D
P4
2
/S
CLK1,
Segment output disable register 1
(1)
Port P3
Input/Output,
individual bits
Input/Output,
individual bits
CMOS compatible input level
CMOS 3-state output
CMOS compatible input level
CMOS 3-state output
Segment output disable register 2
P4
3
/S
RDY1
Port P4
Serial I/O1 function I/O
PULL register 3
Serial I/O1 control register
Serial I/O1 status register
UART control register
PULL register 3
Serial I/O2 control register
Serial I/O2 register
Key input control register
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
P4
4
/S
IN2
/(KW
0
)
P4
5
/S
IN2
/(KW
1
)
P4
2
/S
CLK2
/(KW
2
)
P4
3
/S
RDY2
/(KW
3
)
Serial I/O2
function I/O
Key input
(key-on
wakeup)
interrupt
input
Real time
port function
output
P5
0
/AN
0
/RTP
0
P5
1
/AN
1
/RTP
1
Port P5
Input/Output,
individual bits
CMOS compatible input level
CMOS 3-state output
A/D
conversion
input
PULL register 1
AD control register
Timer Y mode register
(11)
P5
2
/AN
2
P5
6
/AN
6
P5
7
/AN
7
/ADKEY
0
PULL register 1
AD control register
(12)
ADKEY
input
(13)
P6
0
/X
CIN
P6
1
/X
COUT
Port P6
Input/Output,
individual bits
CMOS compatible input level
CMOS 3-state output
Sub-clock
oscillation circuit
PULL register 2
CPU mode register
(14)
(15)
(16)
P6
2
/INT
00
/(LED
0
)
External interrupt input
PULL register 2
Interrupt edge selection register
PULL register 2
Timer X mode register
Timer X control registers 1,2
PULL register 2
Interrupt edge selection
register
PULL register 2
Timer X mode register
Timer X control register 1
PULL register 2
Interrupt edge selection register
Timer X mode register
Timer X control registers 1,2
PULL register 2
Timer Y mode register
Interrupt edge selection register
LCD mode registers 1,2
P6
3
/T
XOUT2
/(LED
1
)
Timer X output 2
(18)
P6
4
/INT
2
/(LED
2
)
External interrupt input
(17)
P6
5
/T
XOUT1
/(LED
3
)
Timer X output 1
(18)
P6
6
/INT
10
/CNTR
0
/
(LED
4
)
Timer X function input
External interrupt input
(19)
P6
7
/CNTR
1
/(LED
5
)
Timer Y function input
(17)
P7
0
/C
1
/INT
01
P7
1
/C
2
/INT
11
Port P7
Input,
individual bits
CMOS compatible input level
External interrupt input
LCD voltage multiplier
input
Timer 2
output
Timer 3
output
Timer 4
output
LCD common output
(20)
P7
2
/T
2OUT
/
CKOUT
P7
3
/PWM
0
/T
3OUT
P7
4
/PWM
1
/T
4OUT
Input/Output
individual bits
CMOS compatible input level
CMOS 3-state output
clock
output
PWM
output
PULL register 3
Timer 1234 mode register
Timer 1234 frequency division
register
Clock output control register
(21)
COM
0
COM
3
COM
4
/SEG
35
COM
7
/SEG
32
Common
Common
/Segment
Output
LCD common output
LCD common/Segment
output
LCD mode register 1,2
(22)
(23)
LCD
Segment
output