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| 型號(hào)： | 38D5 |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 12/141頁(yè) |
| 文件大?。?/td> | 2027K |
| 代理商： | 38D5 |
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Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 12 of 134
38D5 Group
FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)
The 38D5 Group uses the standard 740 Family instruction set.
Refer to the 740 Family Software Manual for details on the
instruction set.
Machine-resident 740 Family instructions are as follows:
The FST and SLW instructions cannot be used.
The STP, WIT, MUL, and DIV instructions can be used.
The central processing unit (CPU) has six registers. Figure 6
shows the 740 Family CPU register structure.
[Accumulator (A)]
The accumulator is an 8-bit register. Data operations such as
arithmetic data transfer, etc., are executed mainly through the
accumulator.
[Index Register X (X)]
The index register X is an 8-bit register. In the index addressing
modes, the value of the OPERAND is added to the contents of
register X and specifies the real address.
[Index Register Y (Y)]
The index register Y is an 8-bit register. In partial instruction, the
value of the OPERAND is added to the contents of register Y
and specifies the real address.
[Stack Pointer (S)]
The stack pointer is an 8-bit register used during subroutine calls
and interrupts. This register indicates start address of stored area
(stack) for storing registers during subroutine calls and
interrupts.
The low-order 8 bits of the stack address are determined by the
contents of the stack pointer. The high-order 8 bits of the stack
address are determined by the stack page selection bit. If the
stack page selection bit is “0”, the high-order 8 bits becomes
“00
16
”. If the stack page selection bit is “1”, the high-order 8 bits
becomes “01
16
”.
The operations of pushing register contents onto the stack and
popping them from the stack are shown in Figure 7.
Table 7 shows the push and pop instructions of accumulator or
processor status register.
Store registers other than those described in Figure 7 with
program when the user needs them during interrupts or
subroutine calls.
[Program Counter (PC)]
The program counter is a 16-bit counter consisting of two 8-bit
registers PC
H
and PC
L
. It is used to indicate the address of the
next instruction to be executed.
Fig. 6 740 Family CPU register structure
Processor status register (PS)
Carry flag
Zero flag
Interrupt disable flag
Decimal mode flag
Break flag
Index X mode flag
Overflow flag
Negative flag
b7 b0
A
b15
Program counter
Stack pointer
Index register Y
Index register X
Accumulator
X
Y
S
PC
L
PC
H
C
Z
I
D
B
T
V
N
b7 b0
b7 b0
b7 b0
b7 b0
b7 b0
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