參數(shù)資料
型號: 38D5
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁數(shù): 124/141頁
文件大?。?/td> 2027K
代理商: 38D5
Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 124 of 134
38D5 Group
Notes on Interrupts
1. Changing Related Register Settings
If the interrupt occurrence synchronized with the following
settings is not required, take the sequence shown below.
When selecting the external interrupt active edge
When selecting the interrupt source of the interrupt vector
address where two or more interrupt sources are allocated
Fig. 102 Sequence for setting related register
<Reason>
In the following cases, the interrupt request bit of the
corresponding interrupt may be set to “1”.
<When switching the external interrupt active edge>
INT
0
interrupt edge selection bit
(bit 0 of interrupt edge selection register (address 003A
16
))
INT
1
interrupt edge selection bit
(bit 1 of interrupt edge selection register)
INT
2
interrupt edge selection bit
(bit 2 of interrupt edge selection register)
CNTR
0
active edge switch bits
(bits 6 and 7 of timer X control register 1 (address 002E
16
))
CNTR
1
active edge switch bit
(bits 6 of timer Y mode register (address 0038
16
))
<When switching the interrupt source of the interrupt vector
address where two or more interrupt sources are allocated>
Timer Y/CNTR
1
interrupt switch bit
(bit 3 of interrupt edge selection register)
<When switching the INT pin>
INT
0
input port switch bit
(bit 4 of interrupt edge selection register)
INT
1
input port switch bit
(bit 5 of interrupt edge select register)
2. Checking Interrupt Request Bit
To check the interrupt request bit with the BBC or BBS
instruction immediately after this bit is set to “0”, take the
following sequence.
<Reason>
If the BBC or BBS instruction is executed immediately after the
interrupt request bit is set to “0”, the bit value before being set to
“0” is read.
Fig. 103 Sequence for setting interrupt request bit
3. Setting Unused Interrupts
Set the interrupt enable bit of the unused interrupt to “0”
(disabled).
Set the interrupt edge selection bit (active edge
switch bit) or interrupt (source) selection bit.
NOP (one or more instructions)
Set the corresponding interrupt enable bit to
“0” (disabled).
Set the corresponding interrupt request bit to “0”
(no interrupt request).
Set the corresponding interrupt enable bit to “1”
(enabled).
NOP (one or more instructions)
Set the interrupt request bit to “0” (no interrupt)
Execute the BBC or BBS instruction
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