參數(shù)資料
型號(hào): 38D5
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁數(shù): 111/141頁
文件大?。?/td> 2027K
代理商: 38D5
Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 111 of 134
38D5 Group
NOTES:
1. Relationship between system clock
φ
frequency and power source voltage is shown in the graph below.
2. When the A/D converter is used, refer to the recommended operating conditions of the A/D converter.
3. 12.5 MHz
<
f(X
IN
)
16 MHz is not available in the frequency/2 mode.
4. The oscillation start voltage and the oscillation start time differ depending on factors such as the oscillator, circuit constants, and
operating temperature range. Note that oscillation start may be particularly difficult at low voltage when using a high-frequency
oscillator.
5. When using the microcomputer in low-speed mode, set the clock input oscillation frequency on condition that f(X
CIN
) < f(X
IN
)/3.
<System clock
φ
frequency>
<Main clock X
IN
frequency>
Table 39
Recommended operating conditions (4)
(V
CC
= 2.7 to 5.5 V, V
SS
= 0 V, T
a
=
20 to 85
°
C, unless otherwise noted)
Symbol
Parameter
Conditions
Limits
Unit
Min.
Typ.
Max.
f(CNTR
0
)
f(CNTR
1
)
Timer X and Timer Y
Input frequency (duty cycle 50%)
4.5V
V
CC
5.5V
6.25
MHz
4.0V
V
CC
<
4.5V
2
×
Vcc
4
MHz
2.7V
V
CC
<
4.0V
Vcc
MHz
f(Tclk)
Timer X, Timer Y,
Timer 1, Timer 2,
Timer 3, Timer 4 clock input frequency
(Count source frequency of each timer)
4.5V
V
CC
5.5V
16
MHz
4.0V
V
CC
<
4.5V
4
×
Vcc
8
MHz
2.7V
V
CC
<
4.0V
2
×
Vcc
MHz
f(
φ
)
System clock
φ
frequency
(1)
4.5V
V
CC
5.5V
6.25
MHz
4.0V
V
CC
<
4.5V
4
MHz
2.7V
V
CC
<
4.0V
Vcc
MHz
f(X
IN
)
Main clock input frequency
(duty cycle 50%)
(2)(3)
4.5V
V
CC
5.5V
1.0
16
MHz
2.7V
V
CC
<
4.5V
1.0
8.0
MHz
f(X
CIN
)
Sub-clock oscillation frequency
(duty cycle 50%)
(4)(5)
32.768
80
kHz
4.0
4.5
5.5
2.7
4.0
6.25
[MHz]
[V]
S
φ
Power source voltage
0
2.7
2.7
4.5
5.5
8.0
[MHz]
16
[V]
M
Power source voltage
0
1.0
FLASH MEMORY VERSION
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