參數(shù)資料
型號(hào)： R8820LV
廠商： Electronic Theatre Controls, Inc.
英文描述： 16-BIT RISC MICROCONTROLLER
中文描述： 16位RISC微控制器
文件頁(yè)數(shù)： 49/98頁(yè)
文件大小： 1000K
代理商： R8820LV
R DC
RISC DSP Controller
R8820LV
RDC Semiconductor Co.
Rev:1.0
Subject to change without notice
49
Bit 8-4 : I4-I0
, Interrupt In-Service.
Set 1: the corresponding INT interrupt is currently being serviced.
Bit 3-2 : D1/I6-D0/I5
, DMA Channel or INT Interrupt In-Service.
Set 1: the corresponding DMA channel or INT interrupt is currently being serviced.
Bit 1 :
Reserved.
Bit 0 : TMR
, Timer Interrupt In-Service.
Set 1: the timer interrupt is currently being serviced.
(Slave Mode)
The bits in the In-Service register are set by the interrupt controller when the interrupt is taken. The in-
service bits are
cleared by writing to the EOI register.
Bit 15-6 :
Reserved.
Bit 5-4 : TMR2-TMR1
, Timer2/Timer1 Interrupt In-Service.
Set 1: the corresponding timer interrupt is currently being serviced.
Bit 3-2 : D1/I6-D0/I5
, DMA Channel or INT Interrupt In-Service.
Set 1: the corresponding DMA Channel or INT Interrupt is currently being serviced.
Bit 1 :
Reserved.
Bit 0 : TMR0
, Timer 0 Interrupt In-Service.
Set 1: the Timer 0 interrupt is currently being serviced.
(Master Mode)
Determining the minimum priority level at which maskable interrupts can generate an interrupt.
Bit 15-3 :
Reserved.
Bit 2-0 : PRM2-PRM0
, Priority Field Mask. Determining the minimum priority that is required in order for a maskable
interrupt source to generate an interrupt.
Priority Mask Register
Offset : 2Ah
Reset Value : 0007h
2
3
0
1
4
5
6
7
8
9
10
11
12
13
14
15
PRM2 PRM1 PRM0
0
0
0
0
0
0
0
0
0
0
0
0
0
In - Service Register
Offset : 2Ch
Reset Value : 0000h
2
3
0
1
4
5
6
7
8
9
10
11
12
13
14
15
Reserved
D0
Res
TMR0
D1
TMR1
TMR2
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