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參數(shù)資料
| 型號： | R8820LV |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 16-BIT RISC MICROCONTROLLER |
| 中文描述： | 16位RISC微控制器 |
| 文件頁數(shù)： | 30/98頁 |
| 文件大?。?/td> | 1000K |
| 代理商： | R8820LV |
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R DC
RISC DSP Controller
R8820LV
RDC Semiconductor Co.
Rev:1.0
Subject to change without notice
30
11.5
Bus Width
The R8820LV default is 16 bits bus access. And the bus can be programmed as 8-bits or 16-bits access during memory or I/O
access is located in the LCSor MCSx or PCSx address space. The UCS code- fetched selection is 16 bits bus width,
which can not be changed by programmed the register.
Bit 15-7
: Reserved.
Bit 6: ENRX1
, Enable the Receiver Request of Serial port 1.
Set 1: The
1
CTS /
1
ENRX pin is configured as
1
ENRX
Set 0: The
1
CTS /
1
ENRX pin is configured as
1
CTS
Bit 5: RTS1
, Enable Request to Send of Serial port 1.
Set 1: The
1
RTR
/
1
RTS pin is configured as
1
RTS
Set 0: The
1
RTR
/
1
RTS pin is configured as
1
RTR
Bit 4: ENRX0
, Enable the Receiver Request of Serial port 0.
Set 1: The
0
CTS /
0
ENRX pin is configured as
0
ENRX
Set 0: The
0
CTS /
0
ENRX pin is configured as
0
CTS
Bit 3: RTS0
, Enable Request to Send of Serial port 0.
Set 1: The
0
RTR /
0
RTS pin is configured as
0
RTS
Set 0: The
0
RTR /
0
RTS pin is configured as
0
RTR
Bit 2: LSIZ
, LCS Data Bus Size selection. This bit can not be changed while executing from LCSspace or while the
Peripheral Control Block is overlaid with PCS space.
Set 1: 8 bits data bus access when the memory access located in the LCSmemory space.
Set 0: 16 bits data bus access when the memory access located in the LCSmemory space.
Bit 1: MSIZ
, MCSx , PCSx Memory Data Bus Size selection. This bit can not be changed while executing from the
associated or while the Peripheral Control Block is overlaid on this address space.
Set 1: 8 bits data bus access when the memory access locate in the selection memory space.
Set 0 : 16 bits data bus access when the memory access locate in the selection memory space.
Bit 0: IOSIZ
, I/O Space Data Bus Size selection. This bit determines the width of the data bus for all I/O space accesses.
Set 1: 8 bits data bus access.
Set 0 : 16 bits data bus access.
Auxiliary configuration Register
Offset : F2h
Reset Value : 0000h
2
3
0
1
4
5
6
7
8
9
10
11
12
13
14
15
Reserved
E
RTS1
E
RTS0
LSIZ
MSIZ IOSIZ
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| R8821 | 制造商:RDC 制造商全稱:RDC 功能描述:16-BIT RISC MICROCONTROLLER |
| R8822 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RDC 16 Bit RISC MICRO-CONTROLLER |
| R8822I | 制造商:RDC 制造商全稱:RDC 功能描述:16-BIT RISC MICROCONTROLLER |
| R8830 | 制造商:RDC 制造商全稱:RDC 功能描述:16-BIT RISC MICROCONTROLLER |
| R8830I | 制造商:RDC 制造商全稱:RDC 功能描述:16-BIT RISC MICROCONTROLLER |
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