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參數資料
| 型號： | R8820LV |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 16-BIT RISC MICROCONTROLLER |
| 中文描述： | 16位RISC微控制器 |
| 文件頁數： | 11/98頁 |
| 文件大?。?/td> | 1000K |
| 代理商： | R8820LV |
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R DC
RISC DSP Controller
R8820LV
RDC Semiconductor Co.
Rev:1.0
Subject to change without notice
11
49
DEN /PIO5
Output/Input
Data enable. This pin is provided as a data bus transceiver
output enable.DEN is asserted during memory and I/O
access. DEN is drived high when DT/
R
changes state. It is
floating during bus hold or reset condition.
Bus cycle status bit6/clock divided by 2. For S6 feature, this
pin is low to indicate a microcontroller-initiated bus cycle or
high to indicate a DMA-initiated bus cycle during T2, T3, Tw
and T4. For CLKDIV2 feature. The internal clock of
microcontroller is the external clock be divided by 2.
(CLKOUTA, CLKOUTB=X1/2), if this pin held low during
power-on reset. The pin is sampled on the rising edge of
RST .
Upper zero indicate. This pin is the logical OR of the inverted
A19-A16. It asserts in the T1 and is held throughout the
cycle.
Chip Select Unit Interface
Midrange memory chip selects. For MCS feature, these pins
are active low when enable the MMCS register to access a
memory. The address ranges are programmable.
3
MCS -
0
MCS are held high during bus hold. When
programming LMCS register, pin69 is as a RFSH pin to auto
refresh the PSAM.
Upper memory chip select/ONCE mode request 1. For UCS
feature, this pin acts low when system accesses the defined
portion memory block of the upper 512K bytes (80000h-
FFFFFh) memory region. UCS default acted address region is
from F0000h to FFFFFh after power-on reset. The address
range acting UCS is programmed by software. For
feature. If
0
ONCE and
rising edge of RST . The microcontroller enters ONCE mode.
In ONCE mode, all pins are high-impedance. This pin
incorporates weakly pull-up resistor.
Lower memory chip select/ONCE mode request 0. For LCS
feature, this pin acts low when the microcontroller accesses the
defined portion memory block of the lower 512K (00000h-
7FFFFh) memory region. The address range acting LCS is
programmed by software.
For
0
ONCE feature, see UCS/
incorporates weakly pull-up register.
Peripheral chip selects/latched address bit. For PCS feature,
these pins act low when the microcontroller accesses the fifth
or sixth region of the peripheral memory (I/O or memory
space). The base address of PCS is programmable. These pins
assert with the AD address bus and are not float during bus
hold.
For latched address bit feature. These pins output the latched
address A2, A1 when cleared the EX bit in the MCSand
PCS auxiliary register. The A2, A1 retains previous latched
data during bus hold.
RTR
/PIO19 Output/Inputmicrocontroller accesses the defined memory area of the
96
S6/CLKDIV/PIO29
Output/Input
97
UZI /PIO26
Output/Input
50
51
68
69
0
MCS /PIO14
MCS /PIO15
MCS /PIO24
3
MCS /RFSH /PIO25
Output/Input
57
UCS/
1
ONCE
Output/Input
1
ONCE
1
ONCE are sampled low on the
58
LCS/
0
ONCE
Output/Input
1
ONCE description. This pin
59
60
6
5
PCS /A2/PIO2
PCS /A1/PIO3
Output/Input
62
63
3
PCS /
1
RTS /
1
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相關代理商/技術參數 |
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| R8830 | 制造商:RDC 制造商全稱:RDC 功能描述:16-BIT RISC MICROCONTROLLER |
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