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APPENDIX C 512K-BIT FLASH MEMORY
MB90560 series
I
Normal Mode
Normal mode is specified when the mode pins are set for other than flash memory mode. The
settings for use prohibition are excluded, though. The 1M-bit flash memory is allocated in the FE
and FF banks on the CPU memory map, so the function of the flash memory interface circuit
enables read access or program access from the CPU in the same way as with normal mask
ROM. In this mode, the 512K-bit flash memory can also be written or erased by an instruction
from the CPU via the flash memory interface circuit. This function enables rewriting in the
installed state under control of the internal CPU. In this mode, normal writing and erasing can be
performed but selector operation such as for enable sector protection cannot be performed.
I
Control Signals of 512K-Bit Flash Memory
Table C.1 lists the flash memory control signals used in normal mode and flash memory mode.
G
Flash memory mode
In this mode, external data bus width is limited to 8 bits and therefore only byte access is
enabled. D15 to D08 are not used. Be sure to set the BYTEX pin to “0”.
G
Normal mode
Signals other than the reset signal are under control of the flash memory interface circuit. The
data bus of flash memory is connected to the internal bus via the flash memory interface circuit.
Selecting between byte and word access makes no sense. Therefore, the BYTEX signal of flash
memory is internally fixed to 1 in this mode.
Table C-1
Correspondence between external control pins and flash memory control signals
External control pin
Flash memory mode pin
Normal mode
RSTX
RSTX
RSTX
P36
BYTEX
Internally fixed to H
P34
Vacant for IM (AQ17)
P33
WEX
Internal and interface control signals
P32
OEX
Internal and interface control signals
P31
CEX
Internal and interface control signals
P30
AQ16
Internal address bus (A16)
P63, P46~ P40
AQ15 ~ AQ8
Internal address bus (A15 to A8)
P27~ P20
AQ7 ~ AQ0
Internal address bus (A7 to A0)
P07~ P00
DQ7 ~ DQ0
Internal data bus (D7 to D0)
MD2 ~MD0
VID pin (5V±5%)
MD2 ~MD0