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CHAPTER 8 I/O PORTS
MB90560 series
8.3
8.3.1 Port 0 Registers (PDR0, DDR0, and RDR0)
Port 0
This section describes the port 0 registers.
I
Functions of Port 0 Registers
G
Port 0 data register (PDR0)
The PDR0 register indicates the state of each pin of port 0.
G
Port 0 data direction register (DDR0)
The DDR0 register specifies the direction of a data flow (input or output) at each pin (bit) of port
“0”. When a DDR0 register bit is “1”, the corresponding port (pin) is set as an output port. When
the bit is 0, the port (pin) is set as an input port.
G
Port 0 pull-up resistor setting register (RDR0)
The RDR0 register specifies the selection of a pull-up resistor at each pin (bit) of port 0. When a
RDR0 register bit is “1”, a pull-up resistor is selected for the corresponding port (pin). When the
bit is “0”, the pull-up resistor is deselected.
Table 8.3-3 lists the functions of the port 0 registers.
Table 8.3-3 Port 0 register functions
R/W
: Read/write enabled
X
: Undefined
Register
Dat
a
During
reading
During writing
Read/
Write
Address
Initial value
Port 0 data
register (PDR0)
0
The pin is
at the low
level.
The output latch is loaded with
“0“. When the pin functions as
an output port, the pin is set to
the low level.
R/W
000000H
XXXXXXXXB
1
The pin is
at the high
level.
The output latch is loaded with
“1“. When the pin functions as
an output port, the pin is set to
the high level.
Port 0 data
direction
register (DDR0)
0
The
direction
latch is “0“.
The output buffer is turned off
to place the port in input mode.
R/W
000010H
00000000B
1
The
direction
latch is “1“.
The output buffer is turned on to
place the port in output mode.
Port 0 pull-up
resistor setting
register (RDR0)
0
The setting
latch is “0“.
The pull-up resistor is cut and
the port is placed in the Hi-Z
state in input mode.
R/W
00008CH
00000000B
1
The setting
latch is “1“.
The pull-up resistor is selected
and the port is held at the high
level in input mode.